Difference between revisions of "DreamSourceLab DSLogic Plus"
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| samplerate_state = 30MHz (?) or 50MHz (?) | | samplerate_state = 30MHz (?) or 50MHz (?) | ||
| triggers = high, low, rising, falling, edge, multi-stage triggers | | triggers = high, low, rising, falling, edge, multi-stage triggers | ||
| voltages = -0.6V — 6V | | voltages = -0.6V — 6V, +-30V with provided probe-wires | ||
| threshold = configurable: 0-5V (0.1V increments) | | threshold = configurable: 0-5V (0.1V increments) | ||
| memory = 256MByte | | memory = 256MByte |
Revision as of 22:49, 10 October 2018
Status | supported |
---|---|
Source code | dreamsourcelab-dslogic |
Channels | 1-16 |
Samplerate | 400MHz(4ch), 200MHz(8ch), 100MHz(16ch) |
Samplerate (state) | 30MHz (?) or 50MHz (?) |
Triggers | high, low, rising, falling, edge, multi-stage triggers |
Min/max voltage | -0.6V — 6V, +-30V with provided probe-wires |
Threshold voltage | configurable: 0-5V (0.1V increments) |
Memory | 256MByte |
Compression | yes |
Website | dreamsourcelab.com |
The DreamSourceLab DSLogic Plus is a 16-channel USB-based logic analyzer, with sampling rates up to 400MHz (when using only 4 channels). This differs slightly from the original DSLogic product in its configurable threshold voltage and different PCB layout. DreamSourceLab doesn't make the distinction between these two products very clear on their website.
See DreamSourceLab DSLogic Plus/Info for more details (such as lsusb -v output) about the device.
Hardware
- Xilinx XC6SLX9 U3: Spartan-6 FPGA (TQG144BIV13337)
- Alliance AS4C16M16SA-7TCN U1: 256Mbit SDRAM
- Cypress CY7C68013A U2: FX2LP USB interface chip
- 128Kbit I²C EEPROM U4: ST M24128-BR
- TI TPS62400 U10: Dual, Adjustable, 400mA and 600mA, 2.25MHz Step-Down Converter (3.3V and 1.2V output)
- 24.0Mhz Crystal Y1: YSX321SL series 20ppm (markings: YXC 24.0SBJI)
Photos
Device:
Cables:
Firmware
See DreamSourceLab DSLogic#Firmware.