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• File:Iebus-mode2-sync-annotated.png (800 × 480 (28 KB)) - 14:53, 7 June 2023

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• HowTo SSH Keys
  # Enter a title, e.g. "Deploy key for sigrok-sync" == Add private key to the source repository (<code>sigrok-sync</code>) ==
  2 KB (260 words) - 18:47, 2 April 2023
• Protocol decoder:Ook vis
  ...and sync might be and then displays the data with a posible structure. The sync position is worked out from the preamble and detects when it switches from * The '''synclen''' option allows the user to set the length of the sync and vary it to see what that does to the data after it.
  3 KB (467 words) - 14:49, 13 October 2018
• User talk:Knarfs
  == Repository Sync == === One sync workflow per repository ===
  4 KB (584 words) - 18:08, 2 April 2023
• RDing TEMPer
  usb: "SYNC INVALID!" "001001001100100" usb: "SYNC INVALID!" "000000000000110000000111111100100000000010001"
  6 KB (768 words) - 19:22, 30 April 2013
• Protocol decoder:Xy2-100
  | probes = CLK, SYNC, DATA The most often encountered setups use common clock and sync signals with two pairs of data and status signals - one for the X and one f
  3 KB (428 words) - 20:10, 10 July 2020
• Protocol decoder:Iebus
  [[File:Iebus-mode2-sync-annotated.png]] In practice the decoder implementation waits for the sync period to expire and then samples the bus to probe which bit is being trans
  2 KB (351 words) - 15:12, 7 June 2023
• Protocol decoder:Ac97
  | probes = sync, bit-clk
  1 KB (186 words) - 21:11, 20 December 2019
• ZEROPLUS Logic Cube LAP-C(322000)
  * Cypress CY7C1480V33-200AXC (72Mbit pipelined sync SRAM, 200MHz)
  1 KB (189 words) - 01:43, 30 October 2014
• Protocol decoder:Ook oregon
  ...a particular sync pattern. Once the Sync pattern is found the Preamble and Sync bits are marked and stripped off. All the remaining data is then interprete
  7 KB (1,066 words) - 14:39, 13 October 2018
• Protocol decoder:Parallel
  There's a lot of hardware (ICs, connectors) that uses various kinds of sync or async parallel protocols.
  2 KB (308 words) - 22:18, 11 November 2020
• Hantek DDS-3X25
  * Sync signal output is connected without any buffer or amplifier. * bit 12 controls the "sync out" port: 1 is on, 0 is off
  4 KB (627 words) - 02:00, 7 March 2017
• ZEROPLUS LAP-16128U
  * Cypress CY7C1347G-250AXC (4Mbit pipelined sync SRAM, 250MHz)
  3 KB (457 words) - 01:17, 30 October 2014
• Protocol decoder:Aud
  ...interface itself is 4 data lines, and 4 control lines (reset, clock, mode, sync):
  2 KB (316 words) - 17:52, 7 April 2016
• ZEROPLUS Logic Cube LAP-C(16032)
  * Cypress CY7C1347G-250AXC (4Mbit pipelined sync SRAM, 250MHz)
  4 KB (471 words) - 16:20, 25 December 2017
• Protocol decoder:Ook gen
  ook_oregon-1: Sync
  3 KB (429 words) - 18:19, 18 June 2018
• Protocol decoder:Arm tpiu
  ...l decoder will use them to synchronize itself with the trace. However, the sync packets are emitted with quite long intervals (several seconds). There are
  4 KB (557 words) - 05:17, 10 April 2019
• Hantek 4032L
  bit 3 - unknown USBXI sync trigger config, default: 1 bit 4 - unknown USBXI sync trigger config, default: 0
  10 KB (1,537 words) - 00:18, 1 August 2019
• Protocol decoder:Pjon
  File:Pjon-ack-seen-direction-turn.png|<small>sync response is seen, turn in communication direction</small> File:Pjon-ack-missing.png|<small>sync response is missing (times out)</small>
  8 KB (1,158 words) - 21:54, 2 July 2020
• ZEROPLUS Logic Cube LAP-C series
  * Cypress pipelined sync SRAM, varies by model:
  4 KB (543 words) - 01:45, 3 November 2014
• IKALOGIC ScanaPLUS
  ...n FTDI FT232H chip (we use libftdi to talk to it) that gets configured to "Sync FIFO" mode by the software, allowing theoretical transfer speeds up to 40 M ...IFO" mode, by first resetting the so-called "bitmode", then setting it to "Sync FIFO" (as per FTDI datasheet).
  15 KB (2,371 words) - 17:06, 7 August 2013

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