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  • ...ond bytes seems to have bit 7 always set to 1, and (some of) the remaining bits (6..0) encode the number of bytes/probes to get (18 for Ant18e, 8 for Ant8) ...robe ID (Ant18e: 0-17, Ant8: 0-7); shift right by 3 bits (on Ant18e), or 4 bits (on Ant8).
    5 KB (872 words) - 20:45, 20 December 2016
  • | vertical_resolution = 8 bits
    1 KB (166 words) - 22:19, 23 July 2014
  • ...re unused. This probably also means that the FPGA discards two of the data bits from the ADCs depending on the selected voltage range. ...they reset the intermediate value to zero as soon as it uses more than 14 bits. As the bytes added are signed, this happens very often.
    12 KB (2,070 words) - 11:02, 1 September 2016
  • ...om/datasheet-pdf/view/887707/BELLING/BL24C08A.html Belling - BL24C08A - 8K bits I2C EEPROM].
    2 KB (269 words) - 20:19, 1 February 2021
  • ...s not a supported parity setting in POSIX, setting parity to None and stop bits to 2 also works.
    6 KB (896 words) - 13:27, 3 March 2015
  • ***register writes are 4bits for addr, 8 bits for value, 2 unused bits and 2 bits im not sure what they are for :) ...simplest explanation for the unused bits is that the device bus width is 7 bits (being a CPLD that is very acceptable).
    11 KB (1,744 words) - 21:49, 18 August 2022
  • ...ort in the form ''<baudrate>/<data bits><parity><stop bits>'', for example "9600/8n1" or "600/7o2".
    6 KB (1,022 words) - 12:13, 5 August 2014
  • (i.e. never by the meter) and the remaining 7 bits are the node identifier. ! 7 bits
    13 KB (1,508 words) - 15:40, 2 November 2020
  • ...dels communicate via an serial connection, at either 19200 or 57600 bps, 8 bits, no parity, and 1 stop bit (57600/8n1 or 19200/8n1). Connecting to the devi
    3 KB (374 words) - 17:56, 15 November 2015
  • | [[File format:bits|Bits]]
    6 KB (868 words) - 21:27, 12 July 2023
  • ...sent on '''PA6''', MSB-first, with rising edges of '''PA5''' to clock the bits out. During each word transfer, '''PA4''' is held low. The most significant ...ng transmitted on '''PA6''', like for the 0x80 operation above, and then 8 bits being received on '''PA7'''. N bytes will be available for an IN transfer a
    12 KB (2,023 words) - 21:34, 22 April 2015
  • All communication is done using a standard RS232 connection with 8 data bits, 1 stop bit and no parity. The transfer rate is not emulated over USB and c ...in the order in which they are sent to the serial port starting left. The bits within one byte are displayed most significant first.
    9 KB (1,455 words) - 19:12, 2 June 2017
  • ...s PoScope Mega50] is a mixed signal oscilloscope with 2 analog channels (8 bits each) and 2 digital ports (16 digital lines in summary).
    4 KB (716 words) - 13:28, 6 January 2020
  • ! Bits 7-4
    4 KB (542 words) - 00:46, 16 November 2015
  • * A6 02 (acquire 64 bytes, 32 samples of 12 bits each, repeated 60 times get 2000 samples) * A6 03 (acquire 64 bytes, 32 samples of 12 bits each, repeated 60 times get 2000 samples)
    7 KB (1,062 words) - 19:56, 12 June 2020
  • ...nicate via an optically isolated serial connection, usually at 9600 bps, 8 bits, no parity, and 1 stop bit (9600/8n1). Some models allow the user to change | 8 || || '''Mode bits''' (several can be set at once)
    39 KB (5,338 words) - 20:51, 6 December 2020
  • dword SampleDepth - sample depth in bits per channel, 2k-64M, must be multiple of 512 dword PretriggerDepth - pretrigger buffer depth in bits, must be < SampleDepth
    10 KB (1,537 words) - 00:18, 1 August 2019
  • ...36 bit at a time, which works out to an integer multiple of 32 (i.e. 4320 bits = 135 32-bit words or 540 bytes). The final six reads are done in chunks of ...coded 36-bit words. The ninth 32-bit word contains the four remaining high bits of all eight 36-bit words combined. The high nibbles are shifted into the n
    21 KB (3,278 words) - 03:00, 31 October 2015
  • ...ut of packets whose data bytes communicate measurement results. Individual bits represent LCD segments for digits including signs, and other indicators. Wh
    4 KB (533 words) - 21:04, 17 May 2021
  • ...At least the Velleman PS3005D V2.0 is a bit buggy here. The only reliable bits are: 0x40 (Output mode: 1:on, 0:off), 0x20 (OVP and/or OCP mode: 1:on, 0:of
    7 KB (980 words) - 15:04, 17 September 2022

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