Difference between revisions of "Saleae Logic16/Firmware"

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(Added dispatch table for EP1_OUT handler)
(→‎Endpoint 1 OUT (EP1_OUT) handler: Explain operation 0x80)
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| 0x80
| 0x80
| 0x205
| 0x205
| ?
| Transmit N (1-31) 16-bit words to the FPGA.  The second byte of the packet encodes N. Data is sent on PA6, with rising edges of PA5 to clock them out. During the transfer, PA4 is held low.  The most significant bit (b15) of each word must be 0.
|-
|-
| 0x81
| 0x81

Revision as of 21:03, 24 July 2013

The following information is related to the vendor firmware included with the version 1.1.15 of the vendor application "Logic".

Interrupt handlers

The following interrupt handlers are installed. If the address is absent, it means the handler just returns (RETI) without performing any action.

RESET 0x0000
TF2 0x0e65
RESUME 0x002e
SUDAV 0x0ae8
SOF 0x13d2
SUTOK 0x13bf
SUSPEND 0x13aa
USB_RESET 0x130b
HISPEED 0x12df
EP0ACK
EP0_IN
EP0_OUT
EP1_IN
EP1_OUT 0x115d
EP2 0x11a2
EP4
EP6
EP8
IBN
EP0PING
EP1PING
EP2PING
EP4PING
EP6PING
EP8PING
ERRLIMIT
EP2ISOERR
EP4ISOERRF
EP6ISOERR
EP8ISOERRF
EP2PF
EP4PF
EP6PF
EP8PF
EP2EF
EP4EF
EP6EF
EP8EF
EP2FF 0x11e7
EP4FF
EP6FF
EP8FF
GPIFDONE
GPIFWF

Endpoint 1 OUT (EP1_OUT) handler

After decrypting the OUT packet, processing of the packet proceeds depending on the first byte of the packet, which selects the operation.

Byte Handler Operation
1 0x14f ?
2 0x157 ?
6 0x15f ?
7 0x1b3 ?
0x7a 0x309 ?
0x7b 0x346 ?
0x7c 0x282 ?
0x7d 0x2aa ?
0x7e 0x2cf ?
0x7f 0x2e4 ?
0x80 0x205 Transmit N (1-31) 16-bit words to the FPGA. The second byte of the packet encodes N. Data is sent on PA6, with rising edges of PA5 to clock them out. During the transfer, PA4 is held low. The most significant bit (b15) of each word must be 0.
0x81 0x23b ?
0x82 0x3a3 ?
others 0x3c7 Do nothing