Difference between revisions of "Main Page"
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* '''Broad hardware support'''. Supports a wide variety of logic analyzers from various vendors with different capabilities. | * '''Broad hardware support'''. Supports a wide variety of logic analyzers from various vendors with different capabilities. | ||
* '''Cross-platform'''. Works on [[Linux]], [[Mac OS X]] and [[ | * '''Cross-platform'''. Works on [[Linux]], [[Mac OS X]], [[Windows]], and [[FreeBSD]], and on many architectures including x86, ARM, Sparc and PowerPC. | ||
* '''Scriptable protocol decoding'''. Extendable with [[protocol decoders]] and analyzers written in Python. | * '''Scriptable protocol decoding'''. Extendable with [[protocol decoders]] and analyzers written in Python. | ||
* '''Format support'''. Supports various [[Input output formats|input and output formats]] (raw, ASCII, hex, CSV, gnuplot, [http://en.wikipedia.org/wiki/Value_change_dump VCD], others). | * '''Format support'''. Supports various [[Input output formats|input and output formats]] (raw, ASCII, hex, CSV, gnuplot, [http://en.wikipedia.org/wiki/Value_change_dump VCD], others). | ||
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* [[Downloads]] | * [[Downloads]] | ||
* Building: [[Linux]], [[Mac OS X]], [[Windows]] | * Building: [[Linux]], [[Mac OS X]], [[Windows]], [[FreeBSD]] | ||
* [[Status]] | * [[Status]] | ||
* [[FAQ]] | * [[FAQ]] | ||
Revision as of 00:20, 3 February 2011
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The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the GNU GPL. Design goals
Supported hardware
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