Difference between revisions of "Sysclk SLA5032"

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| image            = [[File:Sysclk sla5032 mugshot.png|180px]]
| image            = [[File:Sysclk sla5032 mugshot.png|180px]]
| name            = Sysclk SLA5032
| name            = Sysclk SLA5032
| status          = planned
| status          = supported
| source_code_dir  =  
| source_code_dir  = sysclk-sla5032
| channels        = 32
| channels        = 32
| samplerate      = 500MHz
| samplerate      = 500MHz
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| memory          = 2x 1Gbit DDR2 SDRAM
| memory          = 2x 1Gbit DDR2 SDRAM
| compression      = RLE
| compression      = RLE
| website          = [https://sysclk.taobao.com/ sysclk.taobao.com]
| website          = [https://item.taobao.com/item.htm?id=601831958682 sysclk.taobao.com]
}}
}}


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'''Main board''':
'''Main board''':
* '''Microcontroller''': [http://www.atmel.com/devices/ATMEGA8A.aspx Atmel Atmega8A] ([http://www.atmel.com/Images/Atmel-8159-8-bit-AVR-microcontroller-ATmega8A_datasheet.pdf datasheet])
* '''Microcontroller''': [http://www.atmel.com/devices/ATMEGA8A.aspx Atmel ATmega8A] ([http://www.atmel.com/Images/Atmel-8159-8-bit-AVR-microcontroller-ATmega8A_datasheet.pdf datasheet])
* '''USB interface chip''': [http://www.cypress.com/part/cy7c68013a-56ltxi Cypress CY7C68013A-56LTXI (FX2LP)] ([http://www.cypress.com/?docID=34060 datasheet])
* '''USB interface chip''': [http://www.cypress.com/part/cy7c68013a-56ltxi Cypress CY7C68013A-56LTXI (FX2LP)] ([http://www.cypress.com/?docID=34060 datasheet])
* '''32Kbyte I²C EEPROM''': [http://www.atmel.com/devices/at24c256c.aspx Atmel 24C256N] ([http://www.atmel.com/Images/doc5121.pdf datasheet])
* '''32Kbyte I²C EEPROM''': [http://www.atmel.com/devices/at24c256c.aspx Atmel 24C256N] ([http://www.atmel.com/Images/doc5121.pdf datasheet])
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[[Category:Device]]
[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Logic analyzer]]
[[Category:Planned]]
[[Category:Supported]]

Latest revision as of 21:44, 13 January 2020

Sysclk SLA5032
Sysclk sla5032 mugshot.png
Status supported
Source code sysclk-sla5032
Channels 32
Samplerate 500MHz
Samplerate (state)
Triggers low, high, rising, falling
Min/max voltage -50V — 50V
Threshold voltage VIH=1.6V, VIL=1.3V
Memory 2x 1Gbit DDR2 SDRAM
Compression RLE
Website sysclk.taobao.com

The Sysclk SLA5032 is a USB-based, 32-channel logic analyzer with up to 500MHz sampling rate.

See Sysclk SLA5032/Info for more details (such as lsusb -v output) about the device.

This devices can be switched into one of three different modes (the current mode is indicated by a green LED on the respective mode text):

  • 32CH 500M: 500MHz sampling rate, 32 channels, max. 64Mbits storage per channel, support for hardware triggers (sysclk-sla5032 driver).
  • Saleae 100M: The device enumerates as a Saleae Logic16, streaming possible like with the Logic16, only software triggers (saleae-logic16 driver).
  • Saleae 500M: Similar to the above, but the max. sampling rate is actually 500MHz.

Switching between modes is done via the following mechanism: Plug the device into USB, after roughly half a second unplug it and re-plug it again. A green LED will now indicate that another mode was selected (it'll rotate through all three possible modes).

Hardware

Main board:

SODIMM daughterboard:

Photos

Firmware

In order to use this device, you need a firmware/bitstream file from the vendor software (from the CD-ROM shipped with the device or from a vendor download of the software). You can e.g. install the Windows vendor software, then get the file C:\Program Files (x86)\SLA5032\bin\top.bit, rename it to sysclk-sla5032.bit and place it in a location where libsigrok will search for firmware (see libsigrok's README.devices file for details).

Resources