Difference between revisions of "Tektronix TLA520X"
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{{Infobox logic analyzer | {{Infobox logic analyzer | ||
| image = [[File: | | image = [[File:Tektronix TLA5204 1000.png|200px]] | ||
| name = Tektronix TLA520X | | name = Tektronix TLA520X | ||
| status = in progress | | status = in progress | ||
Revision as of 12:07, 22 January 2018
 | |
| Status | in progress |
|---|---|
| Channels | 32/64/96/128 |
| Samplerate | Asynchronous 2Ghz @ 32/64/96/128ch, MagniVu 8Ghz @ 32/64/96/128ch |
| Samplerate (state) | Synchronous (state) 235MHz @ 32/64/96/128ch |
| Triggers | 16 level triggering |
| Min/max voltage | -3.5V — 6.5V continuous |
| Threshold voltage | Configurable: -2.7V — 6.12V |
| Memory | 1MB,2MB,4MB,16MB,32MB |
| Compression | None |
| Website | tla5200 series logic analyzers |
The Tektronix TLA520X series logic analyzer is a networked, 32/64/96/128-channel logic analyzer with up to 2Ghz Asynchronous, 8Ghz memory-limited glitch detection, 235Mhz synchronous sample rate
More to come
Hardware
TODO.
Photos
TODO.
Protocol
TODO.
Resources
- [1] (PDF)