sigrok - User contributions [en]

File:MHINSTEK MHS-5200A CH340.jpg

2018-08-31T08:01:13Z

Lucilanga:

MHINSTEK MHS-5200A

2018-08-31T07:58:29Z

Lucilanga: /* Photos */ add ch340 photo

{{Infobox signal generator
| image = [[File:MHINSTEK_MHS-5200A_persp.jpg|180px]]
| name = MHINSTEK MHS-5200A
| status = planned
| source_code_dir =
| frequser = 0.01Hz-6MHz/12MHz/20MHz/25Hz
| waveforms = sine/square/triangle/sawtooth/arbitrary, TTL rect
| amplitude = 20 V (open)/10 V (50 Ohm) (adjustable)
| connectivity = USB/serial
| website = [https://translate.googleusercontent.com/translate_c?depth=1&hl=en&ie=UTF8&prev=_t&rurl=translate.google.com&sl=auto&sp=nmt4&tl=en&u=http://www.mhinstek.com/product/html/%3F88.html&xid=17259,1500003,15700002,15700022,15700124,15700149,15700168,15700173,15700186,15700190,15700201&usg=ALkJrhj5uwzXTjOX5J5IsZRbjEe2d8Li_w mhinstek.com]
}}

The '''MHINSTEK MHS-5200A''' (-06M/12M/20M/25M) is a dual-channel, standalone function generator. It can be controlled with the push-buttons and the rotary
encoder on the front panel, or via a USB interface.

Amplitude and offset voltage can be controlled programmatically.

Device also supports different measurements via 'Ext. In' or 'TTL' channels. It can measure: frequency, counter, pulse width, period and duty cycle.

== Hardware (Q3 2016 model) ==

* FPGA: Lattice MACH XO2 1200HC TQFP-100
* Clock: unknown
* STM8S005K6 8-bit MCU with 32 Kbytes Flash, 16 MHz CPU, integrated 128 byte EEPROM [http://www.st.com/en/microcontrollers/stm8s005k6.html STM8S005K6 product page]
* Output stage:
** R2R-ladder 12bit DAC
** Signal/DC-offset sum: AD8017 Op-Amp
** Variable gain amplifier: AD603A
** Power amplifier: AD812A
** Output switch relais: 0db/-20db/off
* 24LC512 I²C EEPROM, 512Kb (64K x 8) for arbitrary waveform data
* 74AHC14D hex inverting schmitt trigger

According to the specs, the hardware should run at 200MS/s, but measurement shows it only runs at ~175MS/s.

== Photos ==

<gallery>
MHINSTEK MHS-5200A startscreen1.jpg|Device, front
MHINSTEK MHS-5200A startscreen2.jpg|Device, front
MHINSTEK MHS-5200A base.jpg|PCB, top
MHINSTEK MHS-5200A analog.jpg|PCB, analog circuitry
MHINSTEK MHS-5200A back.jpg|PCB, bottom
MHINSTEK MHS-5200A CH340.jpg|2015 version PCB, with CH340
</gallery>

== Connection ==

The generator has an internal PL2303 USB-to-serial converter. The VID/PID is 067b:2303. Communication parameters are 57600 bps, 8N1.

The earlier 2015 version (firmware 4.22) has CH340 chip for USB-to serial converter, so the VID/PID is 1a86:7523, while rest of the components and functions remain unchanged.

== Protocol ==

The generator uses a plain text protocol for communication.

Each command (''set'' or ''read'') starts with ':' and has to be terminated with a newline, ASCII code 0x0a (but CRLF, i.e. 0x0d 0x0a, is also accepted).

''Set'' commands are acknowledged with an 'ok' response, ''read'' commands echo the request followed by the parameter value.

== Resources ==

* [http://www.analogzoo.com/2015/08/mhs-5200a-teardown-and-review/ analogzoo.com: MHS-5200A Teardown and Review]
* [http://www.eevblog.com/forum/testgear/mhs-5200a-serial-protocol-reverse-engineered/ eevblog.com: MHS-5200A Serial Protocol Reverse Engineered]
* [https://docs.google.com/document/d/1HbLQ4u87RJkD3Ktyw7k9U7Zh5BPNzbrhMlszNGdXiiY/edit Google docs: MHS5200A Protocol]

MHINSTEK MHS-5200A

2018-08-31T07:48:30Z

Lucilanga: /* Connection */ add other vid/pid info

{{Infobox signal generator
| image = [[File:MHINSTEK_MHS-5200A_persp.jpg|180px]]
| name = MHINSTEK MHS-5200A
| status = planned
| source_code_dir =
| frequser = 0.01Hz-6MHz/12MHz/20MHz/25Hz
| waveforms = sine/square/triangle/sawtooth/arbitrary, TTL rect
| amplitude = 20 V (open)/10 V (50 Ohm) (adjustable)
| connectivity = USB/serial
| website = [https://translate.googleusercontent.com/translate_c?depth=1&hl=en&ie=UTF8&prev=_t&rurl=translate.google.com&sl=auto&sp=nmt4&tl=en&u=http://www.mhinstek.com/product/html/%3F88.html&xid=17259,1500003,15700002,15700022,15700124,15700149,15700168,15700173,15700186,15700190,15700201&usg=ALkJrhj5uwzXTjOX5J5IsZRbjEe2d8Li_w mhinstek.com]
}}

The '''MHINSTEK MHS-5200A''' (-06M/12M/20M/25M) is a dual-channel, standalone function generator. It can be controlled with the push-buttons and the rotary
encoder on the front panel, or via a USB interface.

Amplitude and offset voltage can be controlled programmatically.

Device also supports different measurements via 'Ext. In' or 'TTL' channels. It can measure: frequency, counter, pulse width, period and duty cycle.

== Hardware (Q3 2016 model) ==

* FPGA: Lattice MACH XO2 1200HC TQFP-100
* Clock: unknown
* STM8S005K6 8-bit MCU with 32 Kbytes Flash, 16 MHz CPU, integrated 128 byte EEPROM [http://www.st.com/en/microcontrollers/stm8s005k6.html STM8S005K6 product page]
* Output stage:
** R2R-ladder 12bit DAC
** Signal/DC-offset sum: AD8017 Op-Amp
** Variable gain amplifier: AD603A
** Power amplifier: AD812A
** Output switch relais: 0db/-20db/off
* 24LC512 I²C EEPROM, 512Kb (64K x 8) for arbitrary waveform data
* 74AHC14D hex inverting schmitt trigger

According to the specs, the hardware should run at 200MS/s, but measurement shows it only runs at ~175MS/s.

== Photos ==

<gallery>
MHINSTEK MHS-5200A startscreen1.jpg|Device, front
MHINSTEK MHS-5200A startscreen2.jpg|Device, front
MHINSTEK MHS-5200A base.jpg|PCB, top
MHINSTEK MHS-5200A analog.jpg|PCB, analog circuitry
MHINSTEK MHS-5200A back.jpg|PCB, bottom
</gallery>

== Connection ==

The generator has an internal PL2303 USB-to-serial converter. The VID/PID is 067b:2303. Communication parameters are 57600 bps, 8N1.

The earlier 2015 version (firmware 4.22) has CH340 chip for USB-to serial converter, so the VID/PID is 1a86:7523, while rest of the components and functions remain unchanged.

== Protocol ==

The generator uses a plain text protocol for communication.

Each command (''set'' or ''read'') starts with ':' and has to be terminated with a newline, ASCII code 0x0a (but CRLF, i.e. 0x0d 0x0a, is also accepted).

''Set'' commands are acknowledged with an 'ok' response, ''read'' commands echo the request followed by the parameter value.

== Resources ==

* [http://www.analogzoo.com/2015/08/mhs-5200a-teardown-and-review/ analogzoo.com: MHS-5200A Teardown and Review]
* [http://www.eevblog.com/forum/testgear/mhs-5200a-serial-protocol-reverse-engineered/ eevblog.com: MHS-5200A Serial Protocol Reverse Engineered]
* [https://docs.google.com/document/d/1HbLQ4u87RJkD3Ktyw7k9U7Zh5BPNzbrhMlszNGdXiiY/edit Google docs: MHS5200A Protocol]

MHINSTEK MHS-5200A

2018-08-31T07:45:01Z

Lucilanga: add measure mode info

{{Infobox signal generator
| image = [[File:MHINSTEK_MHS-5200A_persp.jpg|180px]]
| name = MHINSTEK MHS-5200A
| status = planned
| source_code_dir =
| frequser = 0.01Hz-6MHz/12MHz/20MHz/25Hz
| waveforms = sine/square/triangle/sawtooth/arbitrary, TTL rect
| amplitude = 20 V (open)/10 V (50 Ohm) (adjustable)
| connectivity = USB/serial
| website = [https://translate.googleusercontent.com/translate_c?depth=1&hl=en&ie=UTF8&prev=_t&rurl=translate.google.com&sl=auto&sp=nmt4&tl=en&u=http://www.mhinstek.com/product/html/%3F88.html&xid=17259,1500003,15700002,15700022,15700124,15700149,15700168,15700173,15700186,15700190,15700201&usg=ALkJrhj5uwzXTjOX5J5IsZRbjEe2d8Li_w mhinstek.com]
}}

The '''MHINSTEK MHS-5200A''' (-06M/12M/20M/25M) is a dual-channel, standalone function generator. It can be controlled with the push-buttons and the rotary
encoder on the front panel, or via a USB interface.

Amplitude and offset voltage can be controlled programmatically.

Device also supports different measurements via 'Ext. In' or 'TTL' channels. It can measure: frequency, counter, pulse width, period and duty cycle.

== Hardware (Q3 2016 model) ==

* FPGA: Lattice MACH XO2 1200HC TQFP-100
* Clock: unknown
* STM8S005K6 8-bit MCU with 32 Kbytes Flash, 16 MHz CPU, integrated 128 byte EEPROM [http://www.st.com/en/microcontrollers/stm8s005k6.html STM8S005K6 product page]
* Output stage:
** R2R-ladder 12bit DAC
** Signal/DC-offset sum: AD8017 Op-Amp
** Variable gain amplifier: AD603A
** Power amplifier: AD812A
** Output switch relais: 0db/-20db/off
* 24LC512 I²C EEPROM, 512Kb (64K x 8) for arbitrary waveform data
* 74AHC14D hex inverting schmitt trigger

According to the specs, the hardware should run at 200MS/s, but measurement shows it only runs at ~175MS/s.

== Photos ==

<gallery>
MHINSTEK MHS-5200A startscreen1.jpg|Device, front
MHINSTEK MHS-5200A startscreen2.jpg|Device, front
MHINSTEK MHS-5200A base.jpg|PCB, top
MHINSTEK MHS-5200A analog.jpg|PCB, analog circuitry
MHINSTEK MHS-5200A back.jpg|PCB, bottom
</gallery>

== Connection ==

The generator has an internal PL2303 USB-to-serial converter. The VID/PID is 067b:2303. Communication parameters are 57600 bps, 8N1.

== Protocol ==

The generator uses a plain text protocol for communication.

Each command (''set'' or ''read'') starts with ':' and has to be terminated with a newline, ASCII code 0x0a (but CRLF, i.e. 0x0d 0x0a, is also accepted).

''Set'' commands are acknowledged with an 'ok' response, ''read'' commands echo the request followed by the parameter value.

== Resources ==

* [http://www.analogzoo.com/2015/08/mhs-5200a-teardown-and-review/ analogzoo.com: MHS-5200A Teardown and Review]
* [http://www.eevblog.com/forum/testgear/mhs-5200a-serial-protocol-reverse-engineered/ eevblog.com: MHS-5200A Serial Protocol Reverse Engineered]
* [https://docs.google.com/document/d/1HbLQ4u87RJkD3Ktyw7k9U7Zh5BPNzbrhMlszNGdXiiY/edit Google docs: MHS5200A Protocol]

Mcupro Logic16 clone

2015-12-18T09:37:54Z

Lucilanga: /* Firmware */

{{DISPLAYTITLE:mcupro Logic16 clone}}
{{Infobox logic analyzer
| image = [[File:Mcupro_Logic16_overview.png|180px]]
| name = mcupro Logic16 clone
| status = supported
| source_code_dir = saleae-logic16
| channels = 3/6/9/16
| samplerate = 100/50/32/16MHz
| samplerate_state = —
| triggers = none (SW-only)
| voltages = -0.9V — 6V
| threshold = 1.5V (operates with 3.3V logic)
| memory = none
| compression = yes
| website = [http://www.aliexpress.com/store/product/USB-Logic-Analyzer-100M-max-sample-rate-16Channels-10B-samples-MCU-ARM-FPGA-debug-tool/614202_1916810169.html aliexpress.com]
}}

The '''mcupro Logic16 clone''' is a USB-based, 16-channel logic analyzer with 100/50/32/16MHz sampling rate (at 3/6/9/16 enabled channels).

This is a clone of the [[Saleae Logic16]].

See [[mcupro Logic16 clone/Info]] for more details (such as '''lsusb -v''' output) about the device.

== Hardware (Actel variant) ==

* '''FPGA''': [https://www.actel.com/documents/PA3_DS.pdf Actel A3P125]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal''': 24MHz

== Hardware (Cylone variant) ==

* '''FPGA''': [https://www.altera.com/products/fpga/cyclone-series/cyclone/support.html#Cyclone-Device-Handbook--All-Sections- Altera Cyclone EP1C3T100]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': 100MHz
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': STCMCU 15F10, 8051 compatible

== Hardware (2015-01-08 variant) ==

The PCB is marked "Saleae Logic 16 By MCUPro 2015-1-8". Readily identifiable by the irregular PCB traces, and switching power supplies. This comes in a different case, identical to the [[Noname_XL-LOGIC16-100M]].

* '''FPGA''': Markings ground off
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': Markings ground off
* '''3.3V voltage regulator''': [http://www.techcodesemi.com/cn/products_info.asp?pid=26 TD 6810] adjustable version + 150k/680k resistors pair
* '''1.5V voltage regulator''': [http://www.techcodesemi.com/cn/products_info.asp?pid=26 TD 6810] adjustable version + 160k/240k resistors pair
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': Looks like 32MHz?
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': Not required?

== Hardware (2014-01-25 variant) ==

The PCB is marked "Saleae Logic 16 mcupro 2014.1.25".

* '''FPGA''': Markings ground off
* '''USB interface chip''': Markings ground off

The bottom two channels are not GND, but SCK (sample clock out) and HCK (half of SCK out).

== Photos (Actel) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro_Logic16_top.jpeg|PCB, top
File:Mcupro_Logic16_bottom.jpeg|PCB, bottom
</gallery>

== Photos (Cyclone) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro Logic16 Variant2 top.jpg|PCB with Altera Cyclone, top
File:IMG 0207 v1.JPG|PCB with Altera Cyclone, bottom
File:Mcupro Logic16 Variant2 top flash+uC.jpg|PCB, top, 1MBit flash and STCMCU uC
</gallery>

== Photos (2015-01-08 variant) ==

<gallery>
File:Xl-logic16-100m-external.jpg|Device, top
File:Mcupro-2015-1-8-top-overview.jpg|PCB, top
File:Mcupro-2015-1-8-bottom-overview.jpg|PCB, bottom
File:Mcupro-2015-1-8-voltage-regulators.jpg|PCB, 3.3 and 1.5 voltage regulators
File:Mcupro-2015-1-8-bottom-markings-intact.jpg|PCB, bottom - chip markings intact
</gallery>

== Photos (2014-01-25 variant) ==

<gallery>
File:seleae-logic16-aliexpress-clone.jpg|Device, top
File:Mcupro-2014-1-25-top-overview.jpg|PCB, top
File:Mcupro-2014-1-25-bottom-overview.jpg|PCB, bottom
</gallery>

== Protocol ==

See [[Saleae_Logic16#Protocol]].

== Firmware ==

;Actel variant
: This logic analyzer works with unmodified Saleae software. The Actel FPGA has on-chip flash storage, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;Cyclone variant
: This logic analyzer works with unmodified Saleae software. The PCB contains an SPI flash chip, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;2015-01-08 variant
: Only requires an upload of Cypress FX2LP firmware to operate. Open-source binaries from [https://github.com/gregani/la16fw gregani] work, but must be renamed to '''saleae-logic16-fx2.fw'''. It also requires a [[libsigrok]] more recent than 2014-08-22 to work (see bug [http://sigrok.org/bugzilla/show_bug.cgi?id=680#c4 #680]).
;2014-01-25 variant
: Seems to have the bitstream in internal flash, so it only requires an upload of Cypress FX2LP firmware in order to operate. This requires a [[libsigrok]] more recent than 2014-08-22 to work (see bug [http://sigrok.org/bugzilla/show_bug.cgi?id=680#c4 #680]).

The firmware extraction steps are identical to [[Saleae_Logic16#Firmware|steps for Saleae Logic16]], however you only need to have '''saleae-logic16-fx2.fw''' installed.

[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Supported]]

File:Mcupro-2015-1-8-bottom-markings-intact.jpg

2015-12-18T09:33:23Z

Lucilanga:

== Licensing ==
{{PD}}

Mcupro Logic16 clone

2015-12-18T09:28:06Z

Lucilanga: /* Photos (2015-01-08 variant) */

{{DISPLAYTITLE:mcupro Logic16 clone}}
{{Infobox logic analyzer
| image = [[File:Mcupro_Logic16_overview.png|180px]]
| name = mcupro Logic16 clone
| status = supported
| source_code_dir = saleae-logic16
| channels = 3/6/9/16
| samplerate = 100/50/32/16MHz
| samplerate_state = —
| triggers = none (SW-only)
| voltages = -0.9V — 6V
| threshold = 1.5V (operates with 3.3V logic)
| memory = none
| compression = yes
| website = [http://www.aliexpress.com/store/product/USB-Logic-Analyzer-100M-max-sample-rate-16Channels-10B-samples-MCU-ARM-FPGA-debug-tool/614202_1916810169.html aliexpress.com]
}}

The '''mcupro Logic16 clone''' is a USB-based, 16-channel logic analyzer with 100/50/32/16MHz sampling rate (at 3/6/9/16 enabled channels).

This is a clone of the [[Saleae Logic16]].

See [[mcupro Logic16 clone/Info]] for more details (such as '''lsusb -v''' output) about the device.

== Hardware (Actel variant) ==

* '''FPGA''': [https://www.actel.com/documents/PA3_DS.pdf Actel A3P125]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal''': 24MHz

== Hardware (Cylone variant) ==

* '''FPGA''': [https://www.altera.com/products/fpga/cyclone-series/cyclone/support.html#Cyclone-Device-Handbook--All-Sections- Altera Cyclone EP1C3T100]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': 100MHz
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': STCMCU 15F10, 8051 compatible

== Hardware (2015-01-08 variant) ==

The PCB is marked "Saleae Logic 16 By MCUPro 2015-1-8". Readily identifiable by the irregular PCB traces, and switching power supplies. This comes in a different case, identical to the [[Noname_XL-LOGIC16-100M]].

* '''FPGA''': Markings ground off
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': Markings ground off
* '''3.3V voltage regulator''': [http://www.techcodesemi.com/cn/products_info.asp?pid=26 TD 6810] adjustable version + 150k/680k resistors pair
* '''1.5V voltage regulator''': [http://www.techcodesemi.com/cn/products_info.asp?pid=26 TD 6810] adjustable version + 160k/240k resistors pair
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': Looks like 32MHz?
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': Not required?

== Hardware (2014-01-25 variant) ==

The PCB is marked "Saleae Logic 16 mcupro 2014.1.25".

* '''FPGA''': Markings ground off
* '''USB interface chip''': Markings ground off

The bottom two channels are not GND, but SCK (sample clock out) and HCK (half of SCK out).

== Photos (Actel) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro_Logic16_top.jpeg|PCB, top
File:Mcupro_Logic16_bottom.jpeg|PCB, bottom
</gallery>

== Photos (Cyclone) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro Logic16 Variant2 top.jpg|PCB with Altera Cyclone, top
File:IMG 0207 v1.JPG|PCB with Altera Cyclone, bottom
File:Mcupro Logic16 Variant2 top flash+uC.jpg|PCB, top, 1MBit flash and STCMCU uC
</gallery>

== Photos (2015-01-08 variant) ==

<gallery>
File:Xl-logic16-100m-external.jpg|Device, top
File:Mcupro-2015-1-8-top-overview.jpg|PCB, top
File:Mcupro-2015-1-8-bottom-overview.jpg|PCB, bottom
File:Mcupro-2015-1-8-voltage-regulators.jpg|PCB, 3.3 and 1.5 voltage regulators
File:Mcupro-2015-1-8-bottom-markings-intact.jpg|PCB, bottom - chip markings intact
</gallery>

== Photos (2014-01-25 variant) ==

<gallery>
File:seleae-logic16-aliexpress-clone.jpg|Device, top
File:Mcupro-2014-1-25-top-overview.jpg|PCB, top
File:Mcupro-2014-1-25-bottom-overview.jpg|PCB, bottom
</gallery>

== Protocol ==

See [[Saleae_Logic16#Protocol]].

== Firmware ==

;Actel variant
: This logic analyzer works with unmodified Saleae software. The Actel FPGA has on-chip flash storage, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;Cyclone variant
: This logic analyzer works with unmodified Saleae software. The PCB contains an SPI flash chip, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;2015-01-08 variant
: Only requires an upload of Cypress FX2LP firmware to operate. Open-source binaries from [https://github.com/gregani/la16fw gregani] work, but must be renamed to '''saleae-logic16-fx2.fw'''.
;2014-01-25 variant
: Seems to have the bitstream in internal flash, so it only requires an upload of Cypress FX2LP firmware in order to operate. This requires a [[libsigrok]] more recent than 2014-08-22 to work (see bug [http://sigrok.org/bugzilla/show_bug.cgi?id=680#c4 #680]).

The firmware extraction steps are identical to [[Saleae_Logic16#Firmware|steps for Saleae Logic16]], however you only need to have '''saleae-logic16-fx2.fw''' installed.

[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Supported]]

Mcupro Logic16 clone

2015-12-18T09:25:10Z

Lucilanga: /* Photos (2015-01-08 variant) */

{{DISPLAYTITLE:mcupro Logic16 clone}}
{{Infobox logic analyzer
| image = [[File:Mcupro_Logic16_overview.png|180px]]
| name = mcupro Logic16 clone
| status = supported
| source_code_dir = saleae-logic16
| channels = 3/6/9/16
| samplerate = 100/50/32/16MHz
| samplerate_state = —
| triggers = none (SW-only)
| voltages = -0.9V — 6V
| threshold = 1.5V (operates with 3.3V logic)
| memory = none
| compression = yes
| website = [http://www.aliexpress.com/store/product/USB-Logic-Analyzer-100M-max-sample-rate-16Channels-10B-samples-MCU-ARM-FPGA-debug-tool/614202_1916810169.html aliexpress.com]
}}

The '''mcupro Logic16 clone''' is a USB-based, 16-channel logic analyzer with 100/50/32/16MHz sampling rate (at 3/6/9/16 enabled channels).

This is a clone of the [[Saleae Logic16]].

See [[mcupro Logic16 clone/Info]] for more details (such as '''lsusb -v''' output) about the device.

== Hardware (Actel variant) ==

* '''FPGA''': [https://www.actel.com/documents/PA3_DS.pdf Actel A3P125]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal''': 24MHz

== Hardware (Cylone variant) ==

* '''FPGA''': [https://www.altera.com/products/fpga/cyclone-series/cyclone/support.html#Cyclone-Device-Handbook--All-Sections- Altera Cyclone EP1C3T100]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': 100MHz
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': STCMCU 15F10, 8051 compatible

== Hardware (2015-01-08 variant) ==

The PCB is marked "Saleae Logic 16 By MCUPro 2015-1-8". Readily identifiable by the irregular PCB traces, and switching power supplies. This comes in a different case, identical to the [[Noname_XL-LOGIC16-100M]].

* '''FPGA''': Markings ground off
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': Markings ground off
* '''3.3V voltage regulator''': [http://www.techcodesemi.com/cn/products_info.asp?pid=26 TD 6810] adjustable version + 150k/680k resistors pair
* '''1.5V voltage regulator''': [http://www.techcodesemi.com/cn/products_info.asp?pid=26 TD 6810] adjustable version + 160k/240k resistors pair
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': Looks like 32MHz?
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': Not required?

== Hardware (2014-01-25 variant) ==

The PCB is marked "Saleae Logic 16 mcupro 2014.1.25".

* '''FPGA''': Markings ground off
* '''USB interface chip''': Markings ground off

The bottom two channels are not GND, but SCK (sample clock out) and HCK (half of SCK out).

== Photos (Actel) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro_Logic16_top.jpeg|PCB, top
File:Mcupro_Logic16_bottom.jpeg|PCB, bottom
</gallery>

== Photos (Cyclone) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro Logic16 Variant2 top.jpg|PCB with Altera Cyclone, top
File:IMG 0207 v1.JPG|PCB with Altera Cyclone, bottom
File:Mcupro Logic16 Variant2 top flash+uC.jpg|PCB, top, 1MBit flash and STCMCU uC
</gallery>

== Photos (2015-01-08 variant) ==

<gallery>
File:Xl-logic16-100m-external.jpg|Device, top
File:Mcupro-2015-1-8-top-overview.jpg|PCB, top
File:Mcupro-2015-1-8-bottom-overview.jpg|PCB, bottom
File:Mcupro-2015-1-8-voltage-regulators.jpg|PCB, 3.3 and 1.5 voltage regulators
</gallery>

== Photos (2014-01-25 variant) ==

<gallery>
File:seleae-logic16-aliexpress-clone.jpg|Device, top
File:Mcupro-2014-1-25-top-overview.jpg|PCB, top
File:Mcupro-2014-1-25-bottom-overview.jpg|PCB, bottom
</gallery>

== Protocol ==

See [[Saleae_Logic16#Protocol]].

== Firmware ==

;Actel variant
: This logic analyzer works with unmodified Saleae software. The Actel FPGA has on-chip flash storage, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;Cyclone variant
: This logic analyzer works with unmodified Saleae software. The PCB contains an SPI flash chip, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;2015-01-08 variant
: Only requires an upload of Cypress FX2LP firmware to operate. Open-source binaries from [https://github.com/gregani/la16fw gregani] work, but must be renamed to '''saleae-logic16-fx2.fw'''.
;2014-01-25 variant
: Seems to have the bitstream in internal flash, so it only requires an upload of Cypress FX2LP firmware in order to operate. This requires a [[libsigrok]] more recent than 2014-08-22 to work (see bug [http://sigrok.org/bugzilla/show_bug.cgi?id=680#c4 #680]).

The firmware extraction steps are identical to [[Saleae_Logic16#Firmware|steps for Saleae Logic16]], however you only need to have '''saleae-logic16-fx2.fw''' installed.

[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Supported]]

Mcupro Logic16 clone

2015-12-18T09:24:49Z

Lucilanga: /* Hardware (2015-01-08 variant) */

{{DISPLAYTITLE:mcupro Logic16 clone}}
{{Infobox logic analyzer
| image = [[File:Mcupro_Logic16_overview.png|180px]]
| name = mcupro Logic16 clone
| status = supported
| source_code_dir = saleae-logic16
| channels = 3/6/9/16
| samplerate = 100/50/32/16MHz
| samplerate_state = —
| triggers = none (SW-only)
| voltages = -0.9V — 6V
| threshold = 1.5V (operates with 3.3V logic)
| memory = none
| compression = yes
| website = [http://www.aliexpress.com/store/product/USB-Logic-Analyzer-100M-max-sample-rate-16Channels-10B-samples-MCU-ARM-FPGA-debug-tool/614202_1916810169.html aliexpress.com]
}}

The '''mcupro Logic16 clone''' is a USB-based, 16-channel logic analyzer with 100/50/32/16MHz sampling rate (at 3/6/9/16 enabled channels).

This is a clone of the [[Saleae Logic16]].

See [[mcupro Logic16 clone/Info]] for more details (such as '''lsusb -v''' output) about the device.

== Hardware (Actel variant) ==

* '''FPGA''': [https://www.actel.com/documents/PA3_DS.pdf Actel A3P125]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal''': 24MHz

== Hardware (Cylone variant) ==

* '''FPGA''': [https://www.altera.com/products/fpga/cyclone-series/cyclone/support.html#Cyclone-Device-Handbook--All-Sections- Altera Cyclone EP1C3T100]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': 100MHz
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': STCMCU 15F10, 8051 compatible

== Hardware (2015-01-08 variant) ==

The PCB is marked "Saleae Logic 16 By MCUPro 2015-1-8". Readily identifiable by the irregular PCB traces, and switching power supplies. This comes in a different case, identical to the [[Noname_XL-LOGIC16-100M]].

* '''FPGA''': Markings ground off
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': Markings ground off
* '''3.3V voltage regulator''': [http://www.techcodesemi.com/cn/products_info.asp?pid=26 TD 6810] adjustable version + 150k/680k resistors pair
* '''1.5V voltage regulator''': [http://www.techcodesemi.com/cn/products_info.asp?pid=26 TD 6810] adjustable version + 160k/240k resistors pair
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': Looks like 32MHz?
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': Not required?

== Hardware (2014-01-25 variant) ==

The PCB is marked "Saleae Logic 16 mcupro 2014.1.25".

* '''FPGA''': Markings ground off
* '''USB interface chip''': Markings ground off

The bottom two channels are not GND, but SCK (sample clock out) and HCK (half of SCK out).

== Photos (Actel) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro_Logic16_top.jpeg|PCB, top
File:Mcupro_Logic16_bottom.jpeg|PCB, bottom
</gallery>

== Photos (Cyclone) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro Logic16 Variant2 top.jpg|PCB with Altera Cyclone, top
File:IMG 0207 v1.JPG|PCB with Altera Cyclone, bottom
File:Mcupro Logic16 Variant2 top flash+uC.jpg|PCB, top, 1MBit flash and STCMCU uC
</gallery>

== Photos (2015-01-08 variant) ==

<gallery>
File:Xl-logic16-100m-external.jpg|Device, top
File:Mcupro-2015-1-8-top-overview.jpg|PCB, top
File:Mcupro-2015-1-8-bottom-overview.jpg|PCB, bottom
File:Mcupro-2015-1-8-voltage-regulators.jpg|PCB, 3.3 and 1.8 voltage regulators
</gallery>

== Photos (2014-01-25 variant) ==

<gallery>
File:seleae-logic16-aliexpress-clone.jpg|Device, top
File:Mcupro-2014-1-25-top-overview.jpg|PCB, top
File:Mcupro-2014-1-25-bottom-overview.jpg|PCB, bottom
</gallery>

== Protocol ==

See [[Saleae_Logic16#Protocol]].

== Firmware ==

;Actel variant
: This logic analyzer works with unmodified Saleae software. The Actel FPGA has on-chip flash storage, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;Cyclone variant
: This logic analyzer works with unmodified Saleae software. The PCB contains an SPI flash chip, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;2015-01-08 variant
: Only requires an upload of Cypress FX2LP firmware to operate. Open-source binaries from [https://github.com/gregani/la16fw gregani] work, but must be renamed to '''saleae-logic16-fx2.fw'''.
;2014-01-25 variant
: Seems to have the bitstream in internal flash, so it only requires an upload of Cypress FX2LP firmware in order to operate. This requires a [[libsigrok]] more recent than 2014-08-22 to work (see bug [http://sigrok.org/bugzilla/show_bug.cgi?id=680#c4 #680]).

The firmware extraction steps are identical to [[Saleae_Logic16#Firmware|steps for Saleae Logic16]], however you only need to have '''saleae-logic16-fx2.fw''' installed.

[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Supported]]

Mcupro Logic16 clone

2015-12-18T09:17:30Z

Lucilanga: /* Photos (2015-01-08 variant) */

{{DISPLAYTITLE:mcupro Logic16 clone}}
{{Infobox logic analyzer
| image = [[File:Mcupro_Logic16_overview.png|180px]]
| name = mcupro Logic16 clone
| status = supported
| source_code_dir = saleae-logic16
| channels = 3/6/9/16
| samplerate = 100/50/32/16MHz
| samplerate_state = —
| triggers = none (SW-only)
| voltages = -0.9V — 6V
| threshold = 1.5V (operates with 3.3V logic)
| memory = none
| compression = yes
| website = [http://www.aliexpress.com/store/product/USB-Logic-Analyzer-100M-max-sample-rate-16Channels-10B-samples-MCU-ARM-FPGA-debug-tool/614202_1916810169.html aliexpress.com]
}}

The '''mcupro Logic16 clone''' is a USB-based, 16-channel logic analyzer with 100/50/32/16MHz sampling rate (at 3/6/9/16 enabled channels).

This is a clone of the [[Saleae Logic16]].

See [[mcupro Logic16 clone/Info]] for more details (such as '''lsusb -v''' output) about the device.

== Hardware (Actel variant) ==

* '''FPGA''': [https://www.actel.com/documents/PA3_DS.pdf Actel A3P125]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal''': 24MHz

== Hardware (Cylone variant) ==

* '''FPGA''': [https://www.altera.com/products/fpga/cyclone-series/cyclone/support.html#Cyclone-Device-Handbook--All-Sections- Altera Cyclone EP1C3T100]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': 100MHz
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': STCMCU 15F10, 8051 compatible

== Hardware (2015-01-08 variant) ==

The PCB is marked "Saleae Logic 16 By MCUPro 2015-1-8". Readily identifiable by the irregular PCB traces, and switching power supplies. This comes in a different case, identical to the [[Noname_XL-LOGIC16-100M]].

* '''FPGA''': Markings ground off
* '''USB interface chip''': Markings ground off, but presumably a Cypress FX2 like all others. [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': Markings ground off
* '''3.3V voltage regulator''': Unrecognized switcher in SOT23-5 (Seems to be 3.8V?!)
* '''1.5V voltage regulator''': Unrecognised switcher in SOT23-5
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': Looks like 32MHz?
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': Not required?

== Hardware (2014-01-25 variant) ==

The PCB is marked "Saleae Logic 16 mcupro 2014.1.25".

* '''FPGA''': Markings ground off
* '''USB interface chip''': Markings ground off

The bottom two channels are not GND, but SCK (sample clock out) and HCK (half of SCK out).

== Photos (Actel) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro_Logic16_top.jpeg|PCB, top
File:Mcupro_Logic16_bottom.jpeg|PCB, bottom
</gallery>

== Photos (Cyclone) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro Logic16 Variant2 top.jpg|PCB with Altera Cyclone, top
File:IMG 0207 v1.JPG|PCB with Altera Cyclone, bottom
File:Mcupro Logic16 Variant2 top flash+uC.jpg|PCB, top, 1MBit flash and STCMCU uC
</gallery>

== Photos (2015-01-08 variant) ==

<gallery>
File:Xl-logic16-100m-external.jpg|Device, top
File:Mcupro-2015-1-8-top-overview.jpg|PCB, top
File:Mcupro-2015-1-8-bottom-overview.jpg|PCB, bottom
File:Mcupro-2015-1-8-voltage-regulators.jpg|PCB, 3.3 and 1.8 voltage regulators
</gallery>

== Photos (2014-01-25 variant) ==

<gallery>
File:seleae-logic16-aliexpress-clone.jpg|Device, top
File:Mcupro-2014-1-25-top-overview.jpg|PCB, top
File:Mcupro-2014-1-25-bottom-overview.jpg|PCB, bottom
</gallery>

== Protocol ==

See [[Saleae_Logic16#Protocol]].

== Firmware ==

;Actel variant
: This logic analyzer works with unmodified Saleae software. The Actel FPGA has on-chip flash storage, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;Cyclone variant
: This logic analyzer works with unmodified Saleae software. The PCB contains an SPI flash chip, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;2015-01-08 variant
: Only requires an upload of Cypress FX2LP firmware to operate. Open-source binaries from [https://github.com/gregani/la16fw gregani] work, but must be renamed to '''saleae-logic16-fx2.fw'''.
;2014-01-25 variant
: Seems to have the bitstream in internal flash, so it only requires an upload of Cypress FX2LP firmware in order to operate. This requires a [[libsigrok]] more recent than 2014-08-22 to work (see bug [http://sigrok.org/bugzilla/show_bug.cgi?id=680#c4 #680]).

The firmware extraction steps are identical to [[Saleae_Logic16#Firmware|steps for Saleae Logic16]], however you only need to have '''saleae-logic16-fx2.fw''' installed.

[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Supported]]

File:Mcupro-2015-1-8-voltage-regulators.jpg

2015-12-18T09:16:52Z

Lucilanga:

== Licensing ==
{{PD}}

Mcupro Logic16 clone

2015-12-18T09:15:02Z

Lucilanga: /* Photos (2015-01-08 variant) */

{{DISPLAYTITLE:mcupro Logic16 clone}}
{{Infobox logic analyzer
| image = [[File:Mcupro_Logic16_overview.png|180px]]
| name = mcupro Logic16 clone
| status = supported
| source_code_dir = saleae-logic16
| channels = 3/6/9/16
| samplerate = 100/50/32/16MHz
| samplerate_state = —
| triggers = none (SW-only)
| voltages = -0.9V — 6V
| threshold = 1.5V (operates with 3.3V logic)
| memory = none
| compression = yes
| website = [http://www.aliexpress.com/store/product/USB-Logic-Analyzer-100M-max-sample-rate-16Channels-10B-samples-MCU-ARM-FPGA-debug-tool/614202_1916810169.html aliexpress.com]
}}

The '''mcupro Logic16 clone''' is a USB-based, 16-channel logic analyzer with 100/50/32/16MHz sampling rate (at 3/6/9/16 enabled channels).

This is a clone of the [[Saleae Logic16]].

See [[mcupro Logic16 clone/Info]] for more details (such as '''lsusb -v''' output) about the device.

== Hardware (Actel variant) ==

* '''FPGA''': [https://www.actel.com/documents/PA3_DS.pdf Actel A3P125]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal''': 24MHz

== Hardware (Cylone variant) ==

* '''FPGA''': [https://www.altera.com/products/fpga/cyclone-series/cyclone/support.html#Cyclone-Device-Handbook--All-Sections- Altera Cyclone EP1C3T100]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': 100MHz
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': STCMCU 15F10, 8051 compatible

== Hardware (2015-01-08 variant) ==

The PCB is marked "Saleae Logic 16 By MCUPro 2015-1-8". Readily identifiable by the irregular PCB traces, and switching power supplies. This comes in a different case, identical to the [[Noname_XL-LOGIC16-100M]].

* '''FPGA''': Markings ground off
* '''USB interface chip''': Markings ground off, but presumably a Cypress FX2 like all others. [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': Markings ground off
* '''3.3V voltage regulator''': Unrecognized switcher in SOT23-5 (Seems to be 3.8V?!)
* '''1.5V voltage regulator''': Unrecognised switcher in SOT23-5
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': Looks like 32MHz?
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': Not required?

== Hardware (2014-01-25 variant) ==

The PCB is marked "Saleae Logic 16 mcupro 2014.1.25".

* '''FPGA''': Markings ground off
* '''USB interface chip''': Markings ground off

The bottom two channels are not GND, but SCK (sample clock out) and HCK (half of SCK out).

== Photos (Actel) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro_Logic16_top.jpeg|PCB, top
File:Mcupro_Logic16_bottom.jpeg|PCB, bottom
</gallery>

== Photos (Cyclone) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro Logic16 Variant2 top.jpg|PCB with Altera Cyclone, top
File:IMG 0207 v1.JPG|PCB with Altera Cyclone, bottom
File:Mcupro Logic16 Variant2 top flash+uC.jpg|PCB, top, 1MBit flash and STCMCU uC
</gallery>

== Photos (2015-01-08 variant) ==

<gallery>
File:Xl-logic16-100m-external.jpg|Device, top
File:Mcupro-2015-1-8-top-overview.jpg|PCB, top
File:Mcupro-2015-1-8-bottom-overview.jpg|PCB, bottom
[[File:Mcupro-2015-1-8-voltage-regulators.jpg|PCB, 3.3 and 1.8 voltage regulators]]
</gallery>

== Photos (2014-01-25 variant) ==

<gallery>
File:seleae-logic16-aliexpress-clone.jpg|Device, top
File:Mcupro-2014-1-25-top-overview.jpg|PCB, top
File:Mcupro-2014-1-25-bottom-overview.jpg|PCB, bottom
</gallery>

== Protocol ==

See [[Saleae_Logic16#Protocol]].

== Firmware ==

;Actel variant
: This logic analyzer works with unmodified Saleae software. The Actel FPGA has on-chip flash storage, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;Cyclone variant
: This logic analyzer works with unmodified Saleae software. The PCB contains an SPI flash chip, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;2015-01-08 variant
: Only requires an upload of Cypress FX2LP firmware to operate. Open-source binaries from [https://github.com/gregani/la16fw gregani] work, but must be renamed to '''saleae-logic16-fx2.fw'''.
;2014-01-25 variant
: Seems to have the bitstream in internal flash, so it only requires an upload of Cypress FX2LP firmware in order to operate. This requires a [[libsigrok]] more recent than 2014-08-22 to work (see bug [http://sigrok.org/bugzilla/show_bug.cgi?id=680#c4 #680]).

The firmware extraction steps are identical to [[Saleae_Logic16#Firmware|steps for Saleae Logic16]], however you only need to have '''saleae-logic16-fx2.fw''' installed.

[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Supported]]

Mcupro Logic16 clone

2015-12-18T09:13:04Z

Lucilanga: /* Photos (2015-01-08 variant) */

{{DISPLAYTITLE:mcupro Logic16 clone}}
{{Infobox logic analyzer
| image = [[File:Mcupro_Logic16_overview.png|180px]]
| name = mcupro Logic16 clone
| status = supported
| source_code_dir = saleae-logic16
| channels = 3/6/9/16
| samplerate = 100/50/32/16MHz
| samplerate_state = —
| triggers = none (SW-only)
| voltages = -0.9V — 6V
| threshold = 1.5V (operates with 3.3V logic)
| memory = none
| compression = yes
| website = [http://www.aliexpress.com/store/product/USB-Logic-Analyzer-100M-max-sample-rate-16Channels-10B-samples-MCU-ARM-FPGA-debug-tool/614202_1916810169.html aliexpress.com]
}}

The '''mcupro Logic16 clone''' is a USB-based, 16-channel logic analyzer with 100/50/32/16MHz sampling rate (at 3/6/9/16 enabled channels).

This is a clone of the [[Saleae Logic16]].

See [[mcupro Logic16 clone/Info]] for more details (such as '''lsusb -v''' output) about the device.

== Hardware (Actel variant) ==

* '''FPGA''': [https://www.actel.com/documents/PA3_DS.pdf Actel A3P125]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal''': 24MHz

== Hardware (Cylone variant) ==

* '''FPGA''': [https://www.altera.com/products/fpga/cyclone-series/cyclone/support.html#Cyclone-Device-Handbook--All-Sections- Altera Cyclone EP1C3T100]
* '''USB interface chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]
* '''3.3V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]
* '''1.5V voltage regulator''': [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': 100MHz
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': STCMCU 15F10, 8051 compatible

== Hardware (2015-01-08 variant) ==

The PCB is marked "Saleae Logic 16 By MCUPro 2015-1-8". Readily identifiable by the irregular PCB traces, and switching power supplies. This comes in a different case, identical to the [[Noname_XL-LOGIC16-100M]].

* '''FPGA''': Markings ground off
* '''USB interface chip''': Markings ground off, but presumably a Cypress FX2 like all others. [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]
* '''I²C EEPROM''': Markings ground off
* '''3.3V voltage regulator''': Unrecognized switcher in SOT23-5 (Seems to be 3.8V?!)
* '''1.5V voltage regulator''': Unrecognised switcher in SOT23-5
* '''Crystal (FX2)''': 24MHz
* '''Crystal (FPGA)''': Looks like 32MHz?
* '''FPGA bitstream''': 25P10 1MBit SPI NOR flash, ST Microelectronics
* '''Bootstrap controller''': Not required?

== Hardware (2014-01-25 variant) ==

The PCB is marked "Saleae Logic 16 mcupro 2014.1.25".

* '''FPGA''': Markings ground off
* '''USB interface chip''': Markings ground off

The bottom two channels are not GND, but SCK (sample clock out) and HCK (half of SCK out).

== Photos (Actel) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro_Logic16_top.jpeg|PCB, top
File:Mcupro_Logic16_bottom.jpeg|PCB, bottom
</gallery>

== Photos (Cyclone) ==

<gallery>
File:Mcupro_Logic16_case_top.jpeg|Device, top
File:Mcupro_Logic16_case_bottom.jpeg|Device, bottom
File:Mcupro Logic16 Variant2 top.jpg|PCB with Altera Cyclone, top
File:IMG 0207 v1.JPG|PCB with Altera Cyclone, bottom
File:Mcupro Logic16 Variant2 top flash+uC.jpg|PCB, top, 1MBit flash and STCMCU uC
</gallery>

== Photos (2015-01-08 variant) ==

<gallery>
File:Xl-logic16-100m-external.jpg|Device, top
File:Mcupro-2015-1-8-top-overview.jpg|PCB, top
File:Mcupro-2015-1-8-bottom-overview.jpg|PCB, bottom
File:Mcupro-2015-1-8-voltage-regulators.jpg|PCB, 3.3 and 1.8 voltage regulators
</gallery>

== Photos (2014-01-25 variant) ==

<gallery>
File:seleae-logic16-aliexpress-clone.jpg|Device, top
File:Mcupro-2014-1-25-top-overview.jpg|PCB, top
File:Mcupro-2014-1-25-bottom-overview.jpg|PCB, bottom
</gallery>

== Protocol ==

See [[Saleae_Logic16#Protocol]].

== Firmware ==

;Actel variant
: This logic analyzer works with unmodified Saleae software. The Actel FPGA has on-chip flash storage, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;Cyclone variant
: This logic analyzer works with unmodified Saleae software. The PCB contains an SPI flash chip, so it only requires an upload of Cypress FX2LP firmware in order to operate.
;2015-01-08 variant
: Only requires an upload of Cypress FX2LP firmware to operate. Open-source binaries from [https://github.com/gregani/la16fw gregani] work, but must be renamed to '''saleae-logic16-fx2.fw'''.
;2014-01-25 variant
: Seems to have the bitstream in internal flash, so it only requires an upload of Cypress FX2LP firmware in order to operate. This requires a [[libsigrok]] more recent than 2014-08-22 to work (see bug [http://sigrok.org/bugzilla/show_bug.cgi?id=680#c4 #680]).

The firmware extraction steps are identical to [[Saleae_Logic16#Firmware|steps for Saleae Logic16]], however you only need to have '''saleae-logic16-fx2.fw''' installed.

[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Supported]]