sigrok - User contributions [en]

Kingst LA2016

2025-02-01T07:32:59Z

Danman: /* Photos */

{{Infobox logic analyzer
| image = [[File:Kingst la2016 mugshot.png|180px]]
| name = Kingst LA2016
| status = supported
| source_code_dir = kingst-la2016
| channels = 16
| samplerate = 200MHz max.
| samplerate_state = State analysis not supported
| triggers = Level (multiple channels) Edge (one channel)
| voltages = -50V — 50V
| threshold = Configurable: -4V—4V, min step 0.01V
| memory = 128MByte DDR2 SDRAM 40M—10G samples
| compression = Yes
| website = [http://www.qdkingst.com/en qdkingst.com]
}}

The '''Kingst LA2016''' is a USB-based, 16-channel logic analyser with 200MHz maximum samplerate and 128MiB sample memory. It is part of the [[Kingst LA Series]] and is supported by the '''kingst-la2016''' sigrok driver.

The current vendor is "Qingdao Kingst Electronics Co., Ltd." but older models are branded "Jiankun" rather than "Kingst".
Detailed specifications and the vendor software are available on the [http://www.qdkingst.com/en/products Kingst website].

TODO Move common items to the series' page. Make device pages specific to devices, avoid redundancy.

* '''Support Status:'''
** It is recommended to use recent software (at least mid November 2021, better February 2022), issues with LA2016 and LA1016 got addressed, and support for other devices has improved.
** 2021-11-19 [https://github.com/sigrokproject/sigrok-firmware/pull/1 Open firmware] for the FX2 MCU is available for testing. FPGA bitstreams extraction from vendor software still is required. Behaviour of the vendor's and the open source MCU firmware shall be the same.
* '''Known Issues:'''
** PulseView allows the user to setup multiple edge triggers, but the analyser only supports one. Please only use one edge trigger to avoid undefined behaviour. Note the edge trigger can be combined with any number of level triggers. (gsi: Is this worth mentioning here? It's well understood that software use is contrained by hardware capabilities, all supported devices have constraints.)
** The device supports an input threshold range of -4.0V to +4.0V, but the sigrok driver currently implements a limited set of discrete values. Which covers all popular logic families (0.8V to 5.0V), but omits zero crossing as well as negative values. Which should not be too limiting a constraint.
** The vendor's hardware design does not allow to read back previously written configurations. The software always needs to assign a set of default values upon startup, and cannot continue using a previously applied configuration.
** Unplugging the analyser and then attempting to start a capture causes PulseView to crash.

See [[Kingst LA2016/Info]] for more details (USB identification).

== Hardware ==

This logic analyser has been on the market since around 2012 and there are a few different revisions of it.
The [[Media:Kingst_LA2016_LA1016_Schematic.zip|schematic]] has been reverse engineered from
a unit purchased in 2020 containing a PCB marked as v1.3.0.
The circuitry of older PCBs is similar but may have different voltage regulators, different input
channel routing to the FPGA, and lack the input threshold adjustment.

The LA1016 uses identical hardware with a different FPGA bitstream which limits the sample rate to 100MHz maximum.

All of these devices use the same firmware for the FX2LP MCU but there are four different FPGA bitstreams;
i.e. LA1016 & LA2016 bitstreams and the older versions of these (to swap some of the input channels as required by PCB routing changes).
Once the FX2LP firmware has been loaded, a 'magic number' is read from EEPROM which identifies the
device and thus allows the correct FPGA bitstream to be loaded.

Note that the LA1016 cannot be boosted to 200MHz by changing the 'magic number' or the FPGA bitstream.
When the FPGA initialises, its reads 16 bytes from U10 which are used to authenticate the bitstream; these bytes are different for 100 and 200MHz devices.
Furthermore, the OEM software performs a challenge-response with U10 to authenticate the logic analyser as genuine 'Kingst'.
The good news is that U10 does not impact sigrok support in any way and we don't need to communicate with it.

Main components and their function:

* '''MCU''' Cypress FX2LP
:This MCU only has volatile memory and in this implementation it's firmware is loaded from the host by the application software.
:Either the OEM firmware or open source firmware can be used.
:In essence, it just performs data moving operations:
#Endpoint 0 to EEPROM read/write
#Endpoint 0 to SPI read/write for FPGA control registers
#Endpoint 2 bulk out to SPI for loading FPGA bitstream
#Endpoint 6 bulk in to read capture data from FPGA/SDRAM

* '''EEPROM''' Atmel AT24C02 2Kbit
:This non-volatile memory stores:
#VID:PID which is 77a1:01a2 for LA1016 and LA2016 devices
#'magic number' to identify model and revision
#purchase date (presumably for warranty claims)
#other information related to U10 but not of interest to sigrok

* '''FPGA''' Altera EP4CE6
:Currently requires the OEM bitstream.
:Has a bank of approximately 60 byte-wide registers accessed via SPI which are used to contol FPGA functions.
:Captures 16 input channels, performs compression (run length encoding, 16bit sample plus 8 bit repetition count).
:Stores samples to SDRAM (or streams direct to USB but we don't implement that method).
:Interestingly, this device (6K LE) shares the same die as the next up device EP4CE10 (10K LE) and can be programmed as such. However, functionality would not be guaranteed as CE6 devices may be CE10 rejects.
:If open source FPGA code were to become available there would be capacity to experiment with more advanced triggers, such as pattern trigger for SPI or I2C.

* '''SDRAM''' Samsung DDR2
:Samples are stored as 3 bytes (16bit sample plus 8 bit repetition count).
:A 'transfer packet' for upload is 16 bytes = 5 compressed samples plus a sequence number byte.
:Burst read/write for this SDRAM is up to 16 bytes, which matches the transfer packet size and is likely used for all SDRAM read/writes.

* '''U10''' Kingst Authentication Device
:Not used by sigrok.
#Provides fixed bytes identifier to FPGA for bitstream validation (either LA1016 100MHz or LA2016 200MHz bitstream)
#Provides challenge-response rolling-code for OEM software to authenticate the device as genuine 'Kingst'

Datasheets:

:U1 [https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-iv.html EP4CE6F17C8N] Cyclone IV E FPGA
:U2,4,5,7 [http://sxsemi.com/upfile/PDWL050019-SOT236.pdf PDWL050019] TVS Diode Array
:U3 [https://www.cypress.com/part/cy7c68013a-100axc CY7C68013A-100AXC] EZUSB MCU
:U6,U8 [http://www.sg-micro.com/show-product-510.html SGM2019] Linear Regulator
:U9 [https://www.microchip.com/wwwproducts/en/AT24C02C AT24C02] EEPROM 2kbit
:U10 (device not identified, small MCU of some type)
:U11 K4T1G164QG-BCF8, DDR2 SDRAM, obsolete
:U12,U13 [http://www.sg-micro.com/show-product-519.html SGM6013] Switch-mode Regulator
:U14 [http://www.sg-micro.com/show-product-203.html SGM8272] Dual Op-amp
:U15 [http://www.ti.com/lit/ds/symlink/tps60403.pdf TPS60403] Charge Pump Voltage Inverter

== Photos ==

<gallery>
File:Kingst la2016 package contents.jpg|Package contents
File:Kingst la2016 paper.jpg|Paper
File:Kingst la2016 device top.jpg|Device, top
File:Kingst la2016 device bottom.jpg|Device, bottom
File:Kingst la2016 pcb top.jpg|PCB, top
File:Kingst la2016 pcb bottom.jpg|PCB, bottom
File:Kingst la2016 cypress fx2.jpg|Cypress FX2
File:Kingst la2016 altera cyclone4 ep4ce6f17c8n.jpg|Altera Cyclone IV
File:Kingst la2016 samsung k4t1g164qg.jpg|Samsung K4T1G164QG
File:Kingst la2016 atmel 24c02n.jpg|Atmel 24C02N
File:Kingst la2016 unmarked ic.jpg|Unmarked IC
File:Kingst la2016 fpni.jpg|PFNI
</gallery>

PCB v1.3.0, device manufactured in 2021-09

<gallery>
File:Kingst-la2016-pcb-1.3.0-top.png|PCB v1.3.0 top
File:Kingst-la2016-pcb-1.3.0-bottom.png|PCB v1.3.0 bottom
</gallery>

PCB v3.2

<gallery>
File:la2016-v3.2.jpeg|PCB v3.2 top
</gallery>

== Protocol ==

See the [[Kingst LA Series]] page for details, all devices communicate to the host in identical ways.

== Firmware ==

See the [[Kingst LA Series]] page for details. All devices share the same firmware extraction requirement.

== Resources ==

* [http://www.qdkingst.com/en/download Vendor software]
* [http://www.qdkingst.com/download/vis_ug_en User guide]
* [[Media:Kingst_LA2016_LA1016_Schematic.zip|Reverse engineered schematic]]

[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Supported]]

Kingst LA2016

2025-02-01T07:32:48Z

Danman: /* Photos */

{{Infobox logic analyzer
| image = [[File:Kingst la2016 mugshot.png|180px]]
| name = Kingst LA2016
| status = supported
| source_code_dir = kingst-la2016
| channels = 16
| samplerate = 200MHz max.
| samplerate_state = State analysis not supported
| triggers = Level (multiple channels) Edge (one channel)
| voltages = -50V — 50V
| threshold = Configurable: -4V—4V, min step 0.01V
| memory = 128MByte DDR2 SDRAM 40M—10G samples
| compression = Yes
| website = [http://www.qdkingst.com/en qdkingst.com]
}}

The '''Kingst LA2016''' is a USB-based, 16-channel logic analyser with 200MHz maximum samplerate and 128MiB sample memory. It is part of the [[Kingst LA Series]] and is supported by the '''kingst-la2016''' sigrok driver.

The current vendor is "Qingdao Kingst Electronics Co., Ltd." but older models are branded "Jiankun" rather than "Kingst".
Detailed specifications and the vendor software are available on the [http://www.qdkingst.com/en/products Kingst website].

TODO Move common items to the series' page. Make device pages specific to devices, avoid redundancy.

* '''Support Status:'''
** It is recommended to use recent software (at least mid November 2021, better February 2022), issues with LA2016 and LA1016 got addressed, and support for other devices has improved.
** 2021-11-19 [https://github.com/sigrokproject/sigrok-firmware/pull/1 Open firmware] for the FX2 MCU is available for testing. FPGA bitstreams extraction from vendor software still is required. Behaviour of the vendor's and the open source MCU firmware shall be the same.
* '''Known Issues:'''
** PulseView allows the user to setup multiple edge triggers, but the analyser only supports one. Please only use one edge trigger to avoid undefined behaviour. Note the edge trigger can be combined with any number of level triggers. (gsi: Is this worth mentioning here? It's well understood that software use is contrained by hardware capabilities, all supported devices have constraints.)
** The device supports an input threshold range of -4.0V to +4.0V, but the sigrok driver currently implements a limited set of discrete values. Which covers all popular logic families (0.8V to 5.0V), but omits zero crossing as well as negative values. Which should not be too limiting a constraint.
** The vendor's hardware design does not allow to read back previously written configurations. The software always needs to assign a set of default values upon startup, and cannot continue using a previously applied configuration.
** Unplugging the analyser and then attempting to start a capture causes PulseView to crash.

See [[Kingst LA2016/Info]] for more details (USB identification).

== Hardware ==

This logic analyser has been on the market since around 2012 and there are a few different revisions of it.
The [[Media:Kingst_LA2016_LA1016_Schematic.zip|schematic]] has been reverse engineered from
a unit purchased in 2020 containing a PCB marked as v1.3.0.
The circuitry of older PCBs is similar but may have different voltage regulators, different input
channel routing to the FPGA, and lack the input threshold adjustment.

The LA1016 uses identical hardware with a different FPGA bitstream which limits the sample rate to 100MHz maximum.

All of these devices use the same firmware for the FX2LP MCU but there are four different FPGA bitstreams;
i.e. LA1016 & LA2016 bitstreams and the older versions of these (to swap some of the input channels as required by PCB routing changes).
Once the FX2LP firmware has been loaded, a 'magic number' is read from EEPROM which identifies the
device and thus allows the correct FPGA bitstream to be loaded.

Note that the LA1016 cannot be boosted to 200MHz by changing the 'magic number' or the FPGA bitstream.
When the FPGA initialises, its reads 16 bytes from U10 which are used to authenticate the bitstream; these bytes are different for 100 and 200MHz devices.
Furthermore, the OEM software performs a challenge-response with U10 to authenticate the logic analyser as genuine 'Kingst'.
The good news is that U10 does not impact sigrok support in any way and we don't need to communicate with it.

Main components and their function:

* '''MCU''' Cypress FX2LP
:This MCU only has volatile memory and in this implementation it's firmware is loaded from the host by the application software.
:Either the OEM firmware or open source firmware can be used.
:In essence, it just performs data moving operations:
#Endpoint 0 to EEPROM read/write
#Endpoint 0 to SPI read/write for FPGA control registers
#Endpoint 2 bulk out to SPI for loading FPGA bitstream
#Endpoint 6 bulk in to read capture data from FPGA/SDRAM

* '''EEPROM''' Atmel AT24C02 2Kbit
:This non-volatile memory stores:
#VID:PID which is 77a1:01a2 for LA1016 and LA2016 devices
#'magic number' to identify model and revision
#purchase date (presumably for warranty claims)
#other information related to U10 but not of interest to sigrok

* '''FPGA''' Altera EP4CE6
:Currently requires the OEM bitstream.
:Has a bank of approximately 60 byte-wide registers accessed via SPI which are used to contol FPGA functions.
:Captures 16 input channels, performs compression (run length encoding, 16bit sample plus 8 bit repetition count).
:Stores samples to SDRAM (or streams direct to USB but we don't implement that method).
:Interestingly, this device (6K LE) shares the same die as the next up device EP4CE10 (10K LE) and can be programmed as such. However, functionality would not be guaranteed as CE6 devices may be CE10 rejects.
:If open source FPGA code were to become available there would be capacity to experiment with more advanced triggers, such as pattern trigger for SPI or I2C.

* '''SDRAM''' Samsung DDR2
:Samples are stored as 3 bytes (16bit sample plus 8 bit repetition count).
:A 'transfer packet' for upload is 16 bytes = 5 compressed samples plus a sequence number byte.
:Burst read/write for this SDRAM is up to 16 bytes, which matches the transfer packet size and is likely used for all SDRAM read/writes.

* '''U10''' Kingst Authentication Device
:Not used by sigrok.
#Provides fixed bytes identifier to FPGA for bitstream validation (either LA1016 100MHz or LA2016 200MHz bitstream)
#Provides challenge-response rolling-code for OEM software to authenticate the device as genuine 'Kingst'

Datasheets:

:U1 [https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-iv.html EP4CE6F17C8N] Cyclone IV E FPGA
:U2,4,5,7 [http://sxsemi.com/upfile/PDWL050019-SOT236.pdf PDWL050019] TVS Diode Array
:U3 [https://www.cypress.com/part/cy7c68013a-100axc CY7C68013A-100AXC] EZUSB MCU
:U6,U8 [http://www.sg-micro.com/show-product-510.html SGM2019] Linear Regulator
:U9 [https://www.microchip.com/wwwproducts/en/AT24C02C AT24C02] EEPROM 2kbit
:U10 (device not identified, small MCU of some type)
:U11 K4T1G164QG-BCF8, DDR2 SDRAM, obsolete
:U12,U13 [http://www.sg-micro.com/show-product-519.html SGM6013] Switch-mode Regulator
:U14 [http://www.sg-micro.com/show-product-203.html SGM8272] Dual Op-amp
:U15 [http://www.ti.com/lit/ds/symlink/tps60403.pdf TPS60403] Charge Pump Voltage Inverter

== Photos ==

<gallery>
File:Kingst la2016 package contents.jpg|Package contents
File:Kingst la2016 paper.jpg|Paper
File:Kingst la2016 device top.jpg|Device, top
File:Kingst la2016 device bottom.jpg|Device, bottom
File:Kingst la2016 pcb top.jpg|PCB, top
File:Kingst la2016 pcb bottom.jpg|PCB, bottom
File:Kingst la2016 cypress fx2.jpg|Cypress FX2
File:Kingst la2016 altera cyclone4 ep4ce6f17c8n.jpg|Altera Cyclone IV
File:Kingst la2016 samsung k4t1g164qg.jpg|Samsung K4T1G164QG
File:Kingst la2016 atmel 24c02n.jpg|Atmel 24C02N
File:Kingst la2016 unmarked ic.jpg|Unmarked IC
File:Kingst la2016 fpni.jpg|PFNI
</gallery>

PCB v1.3.0, device manufactured in 2021-09

<gallery>
File:Kingst-la2016-pcb-1.3.0-top.png|PCB v1.3.0 top
File:Kingst-la2016-pcb-1.3.0-bottom.png|PCB v1.3.0 bottom
</gallery>

PCV v3.2

<gallery>
File:la2016-v3.2.jpeg|PCB v3.2 top
</gallery>

== Protocol ==

See the [[Kingst LA Series]] page for details, all devices communicate to the host in identical ways.

== Firmware ==

See the [[Kingst LA Series]] page for details. All devices share the same firmware extraction requirement.

== Resources ==

* [http://www.qdkingst.com/en/download Vendor software]
* [http://www.qdkingst.com/download/vis_ug_en User guide]
* [[Media:Kingst_LA2016_LA1016_Schematic.zip|Reverse engineered schematic]]

[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Supported]]

File:La2016-v3.2.jpeg

2025-02-01T07:31:55Z

Danman:

Hantek DSO4004C series

2020-04-09T12:01:23Z

Danman: /* Resources */

4 Channel digital storage oscilloscope
1GS/s (1channel), 500MS/s (2 channel), 250MS/s (4 channel)

See [[Hantek DSO4004C series/Info]] for more details (such as '''lsusb -v''' output) about the device.

Keysight VISA driver for windows

== Hardware ==

* '''CPU''': [http://www.keil.com/dd/chip/4904.htm S3C2416XH]
* '''RAM''': [https://eu.mouser.com/ProductDetail/Micron/MT47H32M16NF-25EH-TR?qs=taEdVNyAfdENeSrYbimKjQ== Micron MT47H32M16NF DRAM DDR2 512M 32MX16 FBGA ]
* '''NAND flash ''': ISSI IS34ML01G084 1Gb SLC-4b ECC ([http://www.issi.com/WW/pdf/IS34_35ML01G084.pdf datasheet])
* '''FPGA''': ???
* '''8-bit 1GSa/s ADC''': [http://www.analog.com/en/products/analog-to-digital-converters/standard-adc/high-speed-ad-10msps/hmcad1511.html Analog Devices HMCAD1511] ([http://www.analog.com/media/en/technical-documentation/data-sheets/hmcad1511.pdf datasheet])
* '''Integrated synthesizer and VCO''': [http://www.analog.com/en/products/clock-and-timing/phase-locked-loop/phase-locked-loop-w-integrated-vco/adf4360-7.html#product-overview Analog Devices ADF4360-7] ([http://www.analog.com/media/en/technical-documentation/data-sheets/ADF4360-7.pdf datasheet])
* '''12-bit 165MSa/s DAC''': [http://www.ti.com/product/DAC902 Texas Instruments DAC902E] ([http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=dac902&fileType=pdf datasheet])

== Photos ==

== Resources ==

* [http://www.hantek.com/en/ProductDetail_3_12167.html Product site]
* [https://www.eevblog.com/forum/testgear/voltcraft-dso-1084e-(hantek-dso4084b)-stuck-at-boot-screen/ Forum]

[[Category:Device]]
[[Category:Oscilloscope]]
[[Category:Planned]]

Hantek DSO4004C series

2020-04-09T10:36:36Z

Danman: /* Hardware */

4 Channel digital storage oscilloscope
1GS/s (1channel), 500MS/s (2 channel), 250MS/s (4 channel)

See [[Hantek DSO4004C series/Info]] for more details (such as '''lsusb -v''' output) about the device.

Keysight VISA driver for windows

== Hardware ==

* '''CPU''': [http://www.keil.com/dd/chip/4904.htm S3C2416XH]
* '''RAM''': [https://eu.mouser.com/ProductDetail/Micron/MT47H32M16NF-25EH-TR?qs=taEdVNyAfdENeSrYbimKjQ== Micron MT47H32M16NF DRAM DDR2 512M 32MX16 FBGA ]
* '''NAND flash ''': ISSI IS34ML01G084 1Gb SLC-4b ECC ([http://www.issi.com/WW/pdf/IS34_35ML01G084.pdf datasheet])
* '''FPGA''': ???
* '''8-bit 1GSa/s ADC''': [http://www.analog.com/en/products/analog-to-digital-converters/standard-adc/high-speed-ad-10msps/hmcad1511.html Analog Devices HMCAD1511] ([http://www.analog.com/media/en/technical-documentation/data-sheets/hmcad1511.pdf datasheet])
* '''Integrated synthesizer and VCO''': [http://www.analog.com/en/products/clock-and-timing/phase-locked-loop/phase-locked-loop-w-integrated-vco/adf4360-7.html#product-overview Analog Devices ADF4360-7] ([http://www.analog.com/media/en/technical-documentation/data-sheets/ADF4360-7.pdf datasheet])
* '''12-bit 165MSa/s DAC''': [http://www.ti.com/product/DAC902 Texas Instruments DAC902E] ([http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=dac902&fileType=pdf datasheet])

== Photos ==

== Resources ==

* [http://www.hantek.com/en/ProductDetail_3_12167.html Product site]

[[Category:Device]]
[[Category:Oscilloscope]]
[[Category:Planned]]

Hantek DSO4004C series/Info

2020-04-09T10:02:53Z

Danman: /* lsusb DSO4104C */

== lsusb DSO4104C ==


$ '''lsusb -v -d 049f:505c'''
Bus 002 Device 109: ID 049f:505c Compaq Computer Corp. NOT defined
Device Descriptor:
bLength 18
bDescriptorType 1
bcdUSB 2.00
bDeviceClass 0
bDeviceSubClass 0
bDeviceProtocol 0
bMaxPacketSize0 64
idVendor 0x049f Compaq Computer Corp.
idProduct 0x505c
bcdDevice 2.30
iManufacturer 1 NOT defined
iProduct 2 NOT defined
iSerial 3 CN1943002003936
bNumConfigurations 1
Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength 0x0027
bNumInterfaces 1
bConfigurationValue 1
iConfiguration 0
bmAttributes 0xc0
Self Powered
MaxPower 500mA
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 0
bAlternateSetting 0
bNumEndpoints 3
bInterfaceClass 254 Application Specific Interface
bInterfaceSubClass 3 Test and Measurement
bInterfaceProtocol 0
iInterface 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x81 EP 1 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x02 EP 2 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x83 EP 3 IN
bmAttributes 3
Transfer Type Interrupt
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 2
Device Qualifier (for other device speed):
bLength 10
bDescriptorType 6
bcdUSB 2.00
bDeviceClass 0
bDeviceSubClass 0
bDeviceProtocol 0
bMaxPacketSize0 64
bNumConfigurations 1
can't get debug descriptor: Resource temporarily unavailable
Device Status: 0x0000
(Bus Powered)



== bootlog DSO4104C ==

<pre>
OM*** Warning - bad CRC, using default environment

##### EmbedSky BIOS for SKY2416/TQ2416 #####
This Board: SDRAM is 64MB; Press Space key to Download Mode.!

NAND read: device 0 offset 0x380000, size 0x800
2048 bytes read: OK
**************************normal start*******************************

NAND erase: device 0 offset 0x380000, size 0x80000
Erasing at 0x3e0000 -- 100% complete.
OK

NAND write: device 0 offset 0x380000, size 0x800
Writing data at 0x380800 -- 100% complete.
2048 bytes written: OK

NAND read: device 0 offset 0x380000, size 0x800
2048 bytes read: OK
Saving Environment to NAND...
Erasing Nand...
Warning: Erase size 0x00004000 smaller than one erase block 0x00020000
Erasing 0x00020000 instead
Erasing at 0x80000 -- 100% complete.
Writing to Nand... done

NAND read: device 0 offset 0x400000, size 0x400000
4194304 bytes read: OK
Boot with zImage

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Linux version 3.2.35 (root@zgt) (gcc version 4.3.3 (Sourcery G++ Lite 2009q1-176) ) #122 PREEMPT Fri Sep 20 23:29:30 CST 2019
CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
CPU: VIVT data cache, VIVT instruction cache
Machine: SMDK2416
Ignoring unrecognised tag 0x54410008
Memory policy: ECC disabled, Data cache writeback
CPU S3C2416/S3C2450 (id 0x32450003)
S3C24XX Clocks, Copyright 2004 Simtec Electronics
CPU: MPLL on 800.000 MHz, cpu 400.000 MHz, mem 133.333 MHz, pclk 66.666 MHz
CPU: EPLL on 96.000 MHz, usb-bus 48.000 MHz
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16256
Kernel command line: noinitrd ubi.mtd=5 ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs init=/linuxrc console=ttySAC0 lcd=X480Y272
PID hash table entries: 256 (order: -2, 1024 bytes)
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Memory: 64MB = 64MB total
Memory: 58944k/58944k available, 6592k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
vmalloc : 0xc4800000 - 0xf6000000 ( 792 MB)
lowmem : 0xc0000000 - 0xc4000000 ( 64 MB)
modules : 0xbf000000 - 0xc0000000 ( 16 MB)
.text : 0xc0008000 - 0xc03fc000 (4048 kB)
.init : 0xc03fc000 - 0xc041b000 ( 124 kB)
.data : 0xc041c000 - 0xc05b6200 (1641 kB)
.bss : 0xc05b6224 - 0xc05d3ffc ( 120 kB)
SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:107
irq: clearing subpending status 00000002
Calibrating delay loop... 198.45 BogoMIPS (lpj=496128)
pid_max: default: 4096 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
NET: Registered protocol family 16
S3C2416: Initializing architecture
S3C2416: IRQ Support
S3C24XX DMA Driver, Copyright 2003-2006 Simtec Electronics
DMA channel 0 at c4804000, irq 88
DMA channel 1 at c4804100, irq 89
DMA channel 2 at c4804200, irq 90
DMA channel 3 at c4804300, irq 91
DMA channel 4 at c4804400, irq 92
DMA channel 5 at c4804500, irq 93
bio: create slab <bio-0> at 0
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
s3c-i2c s3c2410-i2c: slave address 0x10
s3c-i2c s3c2410-i2c: bus frequency set to 9 KHz
s3c-i2c s3c2410-i2c: i2c-0: S3C I2C adapter
Advanced Linux Sound Architecture Driver Version 1.0.24.
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 2048 (order: 2, 16384 bytes)
TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP reno registered
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
s3c-adc s3c24xx-adc: attached adc driver
msgmni has been set to 115
io scheduler noop registered (default)
io scheduler cfq registered
s3c-fb s3c-fb: window 0: fb
s3c-fb s3c-fb: LCD type is TN83 800*480, default_bpp=16, pixclock=5
s3c-fb s3c-fb: window 1: fb
s3c-fb s3c-fb: LCD type is TN83 800*480, default_bpp=16, pixclock=5
s3c2440-uart.0: ttySAC0 at MMIO 0x50000000 (irq = 70) is a S3C2440
console [ttySAC0] enabled
s3c2440-uart.1: ttySAC1 at MMIO 0x50004000 (irq = 73) is a S3C2440
s3c2440-uart.2: ttySAC2 at MMIO 0x50008000 (irq = 76) is a S3C2440
s3c2440-uart.3: ttySAC3 at MMIO 0x5000c000 (irq = 94) is a S3C2440
loop: module loaded
S3C24XX NAND Driver, (c) 2004 Simtec Electronics
info->cpu_type=3, tacls_max=8
s3c24xx-nand s3c2416-nand: Tacls=3, 22ns Twrph0=7 52ns, Twrph1=3 22ns
s3c24xx-nand s3c2416-nand: System booted from NAND
s3c24xx-nand s3c2416-nand: NAND ECC disabled
NAND device: Manufacturer ID: 0xc8, Chip ID: 0xd1 (ISSI NAND 128MiB 3,3V 8-bit)
NAND_ECC_NONE selected by board driver. This is not recommended!
Scanning device for bad blocks
Bad eraseblock 588 at 0x000004980000
Bad eraseblock 982 at 0x000007ac0000
Creating 9 MTD partitions on "NAND":
0x000000000000-0x000000100000 : "uboot"
0x000000100000-0x000000180000 : "params"
0x000000180000-0x000000380000 : "logo"
0x000000380000-0x000000400000 : "misc"
0x000000400000-0x000000800000 : "kernel"
0x000000800000-0x000003a00000 : "rootfs"
0x000003a00000-0x000004e00000 : "config"
0x000004e00000-0x000005200000 : "kernel_bk"
0x000005200000-0x000008000000 : "recover"
UBI: attaching mtd5 to ubi0
UBI: physical eraseblock size: 131072 bytes (128 KiB)
UBI: logical eraseblock size: 126976 bytes
UBI: smallest flash I/O unit: 2048
UBI: VID header offset: 2048 (aligned 2048)
UBI: data offset: 4096
UBI: max. sequence number: 858
UBI: attached mtd5 to ubi0
UBI: MTD device name: "rootfs"
UBI: MTD device size: 50 MiB
UBI: number of good PEBs: 400
UBI: number of bad PEBs: 0
UBI: number of corrupted PEBs: 0
UBI: max. allowed volumes: 128
UBI: wear-leveling threshold: 4096
UBI: number of internal volumes: 1
UBI: number of user volumes: 1
UBI: available PEBs: 0
UBI: total number of reserved PEBs: 400
UBI: number of PEBs reserved for bad PEB handling: 4
UBI: max/mean erase counter: 5/2
UBI: image sequence number: 0
UBI: background thread "ubi_bgt0d" started, PID 341
UBI: attaching mtd6 to ubi1
UBI: physical eraseblock size: 131072 bytes (128 KiB)
UBI: logical eraseblock size: 126976 bytes
UBI: smallest flash I/O unit: 2048
UBI: VID header offset: 2048 (aligned 2048)
UBI: data offset: 4096
UBI: max. sequence number: 692
UBI: attached mtd6 to ubi1
UBI: MTD device name: "config"
UBI: MTD device size: 20 MiB
UBI: number of good PEBs: 159
UBI: number of bad PEBs: 1
UBI: number of corrupted PEBs: 0
UBI: max. allowed volumes: 128
UBI: wear-leveling threshold: 4096
UBI: number of internal volumes: 1
UBI: number of user volumes: 1
UBI: available PEBs: 0
UBI: total number of reserved PEBs: 159
UBI: number of PEBs reserved for bad PEB handling: 2
UBI: max/mean erase counter: 7/5
UBI: image sequence number: 0
UBI: background thread "ubi_bgt1d" started, PID 344
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
s3c2410-ohci s3c2410-ohci: S3C24XX OHCI
s3c2410-ohci s3c2410-ohci: new USB bus registered, assigned bus number 1
s3c2410-ohci s3c2410-ohci: irq 42, io mem 0x49000000
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
usbcore: registered new interface driver usblp
usbcore: registered new interface driver uas
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
samsung-ts s3c2416-ts: driver attached, registering input device
input: S3C24XX TouchScreen as /devices/virtual/input/input0
S3C24XX RTC, (c) 2004,2006 Simtec Electronics
s3c-rtc s3c2410-rtc: rtc disabled, re-enabling
s3c-rtc s3c2410-rtc: rtc core: registered s3c as rtc0
i2c /dev entries driver
S3C2410 Watchdog Timer, (c) 2004 Simtec Electronics
s3c2410-wdt s3c2410-wdt: watchdog inactive, reset disabled, irq disabled
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
s3c-sdhci s3c-sdhci.1: clock source 0: hsmmc (133333333 Hz)
s3c-sdhci s3c-sdhci.1: clock source 1: hsmmc (133333333 Hz)
s3c-sdhci s3c-sdhci.1: clock source 2: hsmmc-if (24000000 Hz)
mmc0: SDHCI controller on samsung-hsmmc [s3c-sdhci.1] using ADMA
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
S3C24XX_UDA134X SoC Audio driver
S3C24XX_UDA134X SoC Audio: l3 data pin already in use
s3c24xx_uda134x: probe of s3c24xx_uda134x.0 failed with error -16
ALSA device list:
No soundcards found.
TCP cubic registered
NET: Registered protocol family 17
Registering the dns_resolver key type
s3c-rtc s3c2410-rtc: setting system clock to 2020-04-10 08:59:58 UTC (1586509198)
UBIFS: recovery needed
UBIFS: recovery completed
UBIFS: mounted UBI device 0, volume 0, name "rootfs"
UBIFS: file system size: 48377856 bytes (47244 KiB, 46 MiB, 381 LEBs)
UBIFS: journal size: 9023488 bytes (8812 KiB, 8 MiB, 72 LEBs)
UBIFS: media format: w4/r0 (latest is w4/r0)
UBIFS: default compressor: lzo
UBIFS: reserved for root: 0 bytes (0 KiB)
VFS: Mounted root (ubifs filesystem) on device 0:10.
Freeing init memory: 124K
UBIFS: recovery needed
UBIFS: recovery completed
UBIFS: mounted UBI device 1, volume 0, name "config"
UBIFS: file system size: 18030592 bytes (17608 KiB, 17 MiB, 142 LEBs)
UBIFS: journal size: 9023488 bytes (8812 KiB, 8 MiB, 72 LEBs)
UBIFS: media format: w4/r0 (latest is w4/r0)
UBIFS: default compressor: lzo
UBIFS: reserved for root: 0 bytes (0 KiB)

Please press Enter to activate this console. dso-iobank: install ok
0x603
gpio_major_n = 6, io_minor_n = 3, output 0
0x408
gpio_major_n = 4, io_minor_n = 8, output 1
AFG3050 fpga configure init
adc init
TQ2416 ADC driver
tq2416_backlight_init_timer0:0x200, 0x2
bkl tq2416-backlight initialized done...
dso-buzzer s3c2416-beep initialized done...
user file is /lib/firmware/dso4000.bit
nstatus0 :0x0
nstatus1 :0x1
fpga state :0x1
file len is 460418
FPGA CONFIGURE DATA DOWN finish.0x1, 0
FPGA CONFIGURE ok.
fpga bank 11811
input: dso_kbd as /devices/virtual/misc/dso-fpga/input1
dso-fpga: install ok
make snd node.
dm9000 Ethernet Driver, V1.31
dm9000 dm9000: read wrong id 0x2b2a2928
dm9000 dm9000: read wrong id 0x2b2a2928
dm9000 dm9000: read wrong id 0x2b2a2928
dm9000 dm9000: read wrong id 0x2b2a2928
dm9000 dm9000: read wrong id 0x2b2a2928
dm9000 dm9000: read wrong id 0x2b2a2928
dm9000 dm9000: read wrong id 0x2b2a2928
dm9000 dm9000: read wrong id 0x2b2a2928
dm9000 dm9000: wrong id: 0x2b2a2928
dm9000 dm9000: not found (-19).
ifconfig: SIOCSIFADDR: No such device
Erasing 128 Kibyte @ 80000 - 100% complete.
--------------------------------------------------------------------------------
start
--------------------------------------------------------------------------------
reg is 0x2, val is 0x1
reg is 0x2, val is 0x3
reg is 0x3, val is 0x0
reg is 0x4, val is 0x39
reg is 0x7, val is 0x3f
reg is 0x8, val is 0x8
reg is 0x9, val is 0x80
reg is 0xd, val is 0x8
reg is 0xf, val is 0x1b
reg is 0x10, val is 0x20
reg is 0x11, val is 0x5c
reg is 0x12, val is 0x40
reg is 0x13, val is 0x2a
reg is 0x14, val is 0x11
reg is 0x15, val is 0x11
reg is 0x16, val is 0xe0
reg is 0x17, val is 0x8
reg is 0x19, val is 0x1f
reg is 0x1a, val is 0x8
reg is 0x1b, val is 0x23
reg is 0x1c, val is 0x20
reg is 0x1d, val is 0x20
reg is 0x1f, val is 0x28
reg is 0x20, val is 0x80
reg is 0x21, val is 0x12
reg is 0x22, val is 0x58
reg is 0x23, val is 0x74
reg is 0x25, val is 0x1
reg is 0x26, val is 0x4
reg is 0x37, val is 0x20
reg is 0x39, val is 0x20
reg is 0x3b, val is 0x20
reg is 0x41, val is 0x9a
reg is 0x4d, val is 0x3
reg is 0x4e, val is 0x50
reg is 0x4f, val is 0xda
reg is 0x50, val is 0x74
reg is 0x51, val is 0x4b
reg is 0x52, val is 0x12
reg is 0x53, val is 0x13
reg is 0x55, val is 0xe5
reg is 0x5e, val is 0x80
reg is 0x69, val is 0x64
reg is 0x77, val is 0x3
reg is 0x7d, val is 0x62
reg is 0x4, val is 0x38
reg is 0x6, val is 0x71
reg is 0x3, val is 0x0
reg is 0x3, val is 0x0
reg is 0x3, val is 0x0
reg is 0x3, val is 0x0
reg is 0x3, val is 0x0
reg is 0x6, val is 0x70
reg is 0x2, val is 0x2
reg is 0x2, val is 0x3
reg is 0x4, val is 0x0
fpga_ctl_kbd_open:1: (null)
fpga_ctl_kbd_open:2:c3b497a0
open kbd dso_kbd successful
dbus is valid and addr is unix:path=/tmp/dbus-lmSHWwAP0O,guid=7b4394ba4a0c7c3399a88a975e903592
system info do begin
init system info ...
read_sytem_infos_from_file:1:100M$DSO4104C
read_sytem_infos_from_file:2:DSO4104C,100M
init system info over
system info do end
anolis_init:machine is 100M
anolis_init:after adjust intensity
anolis_init:over
fpga_init:0x40011000
pll is locked
gpio_major_n = 0, io_minor_n = 2, output 0
gpio_major_n = 0, io_minor_n = 3, output 0
gpio_major_n = 0, io_minor_n = 4, output 0
gpio_major_n = 0, io_minor_n = 8, output 0
gpio_major_n = 10, io_minor_n = 12, output 1
util_helper_load_setup:0, 0
init_calibration_result: in:/config/root/cali.dat
init_calibration_result:1:12345678, 12345678
init_calibration_result:2:101, 101
init_calibration_result:3:89abcdef, 89abcdef
init_calibration_result: has calibration result
measure_helper_set_one_chn_all_only:0
fpga pll is ok
acq_dot_nm_of_timerange =4000,time_range=80000000000,dso_acq.dot_factor =1,sample_rate =50000.000000
dso_acq_control:1:2056, 2056,1800
dso_acq_control:2:3856, 256
dso_acq_control:3:9640000, 680000
dso_acq_control:4:after= 9640000, before= 680000
acq_dot_nm_of_timerange =4000,time_range=80000000000,dso_acq.dot_factor =1,sample_rate =50000.000000
dso_acq_control:1:2056, 2056,1800
dso_acq_control:2:3856, 256
dso_acq_control:3:9640000, 680000
dso_acq_control:4:after= 9640000, before= 680000
util_thread_start_with_sched_priority:thread 0x9ed690 is running
dds_calibration_load:success,read_data = 40
dds_calibrate_uniformlize_offset:0x100011
dds_calibrate_uniformlize_offset:-0.000526, 3.909857, -3.903463, 0.000000, 1.000000, 0.255973, -0.000526
dds_calibrate_uniformlize_amp:0x100011
dds_calibrate_uniformlize_amp:7.813320, 1.500000
**********amp_value = 0.191980,amp = 393,cal_value =1.000000
CN*********
android_init_functions tmc init
android_usb gadget: android_usb ready
s3c-hsudc s3c-hsudc: bound driver android_usb
android_enable_function: tmc enabled
android_bind_enabled_functions bind name: tmc
dual speed tmc: IN/ep1in, OUT/ep2out, INTep3in/
dso_wave_plot_init_normal:0xddba0:770,400
anolis_picture_width:21 picture!=NULL failed.
anolis_picture_width:21 picture!=NULL failed.
anolis_picture_width:21 picture!=NULL failed.
anolis_picture_width:21 picture!=NULL failed.
anolis_picture_width:21 picture!=NULL failed.
fpga_ctl_kbd_event:in
fpga_ctl_kbd_event:17, 3, 1, 4fpga_ctl_kbd_event:in
fpga_ctl_kbd_event:17, 6, 1, 24fpga_ctl_kbd_event:in
fpga_ctl_kbd_event:17, 2, 1, 26fpga_ctl_kbd_event:in
fpga_ctl_kbd_event:17, 7, 1, 66update_trigtime:0.036000, 36ms
util_thread_start_with_sched_priority:thread 0xa06b70 is running

unix:path=/tmp/dbus-lmSHWwAP0O,guid=7b4394ba4a0c7c3399a88a975e903592
[root@Hantek ~]#ls
bin etc model spi_pll.data var
config lib proc sys version
dev linuxrc root tmp www
dso mnt sbin usr
[root@Hantek ~]#mount
rootfs on / type rootfs (rw)
ubi0:rootfs on / type ubifs (rw,relatime)
proc on /proc type proc (rw,relatime)
tmpfs on /tmp type tmpfs (rw,relatime)
sysfs on /sys type sysfs (rw,relatime)
tmpfs on /dev type tmpfs (rw,relatime)
tmpfs on /var type tmpfs (rw,relatime)
devpts on /dev/pts type devpts (rw,relatime,mode=600,ptmxmode=000)
ubi1:config on /config type ubifs (rw,relatime)
[root@Hantek ~]#uname -a
Linux dso4000 3.2.35 #122 PREEMPT Fri Sep 20 23:29:30 CST 2019 armv5tejl GNU/Linux
[root@Hantek ~]#cat /proc/cpuinfo
Processor : ARM926EJ-S rev 5 (v5l)
BogoMIPS : 198.45
Features : swp half fastmult edsp java
CPU implementer : 0x41
CPU architecture: 5TEJ
CPU variant : 0x0
CPU part : 0x926
CPU revision : 5

Hardware : SMDK2416
Revision : 0000
Serial : 0000000000000000
[root@Hantek ~]#cat /proc/mtd
dev: size erasesize name
mtd0: 00100000 00020000 "uboot"
mtd1: 00080000 00020000 "params"
mtd2: 00200000 00020000 "logo"
mtd3: 00080000 00020000 "misc"
mtd4: 00400000 00020000 "kernel"
mtd5: 03200000 00020000 "rootfs"
mtd6: 01400000 00020000 "config"
mtd7: 00400000 00020000 "kernel_bk"
mtd8: 02e00000 00020000 "recover"
mtd9: 02f78000 0001f000 "rootfs"
mtd10: 01287000 0001f000 "config"
[root@Hantek ~]#cat /proc/cmdline
noinitrd ubi.mtd=5 ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs init=/linuxrc console=ttySAC0 lcd=X480Y272
[root@Hantek ~]#
[root@Hantek ~]#cat /config/root/system.inf
[machine]
Model=250M$DSO4254C
Vendor=Hantek
Product=DSO
Manufacturer=hantek
Serial=CN*********
[version]
Pcb=501.001.001.000.000.000.0
Keyboard=1
[language]
Lans=163190
Language=0
[add]
Start=39
Update=0
[root@Hantek ~]#
</pre>

Hantek DSO4004C series

2020-03-01T15:48:45Z

Danman:

4 Channel digital storage oscilloscope
1GS/s (1channel), 500MS/s (2 channel), 250MS/s (4 channel)

See [[Hantek DSO4004C series/Info]] for more details (such as '''lsusb -v''' output) about the device.

Keysight VISA driver for windows

== Hardware ==

== Photos ==

== Resources ==

* [http://www.hantek.com/en/ProductDetail_3_12167.html Product site]

[[Category:Device]]
[[Category:Oscilloscope]]
[[Category:Planned]]

Hantek DSO4004C series

2020-03-01T14:35:51Z

Danman:

4 Channel digital storage oscilloscope
1GS/s (1channel), 500MS/s (2 channel), 250MS/s (4 channel)

See [[Hantek DSO4004C series/Info]] for more details (such as '''lsusb -v''' output) about the device.

Keysight VISA driver for windows

== Resources ==

* [http://www.hantek.com/en/ProductDetail_3_12167.html Product site]

[[Category:Device]]
[[Category:Oscilloscope]]
[[Category:Planned]]

Hantek DSO4004C series

2020-03-01T14:33:37Z

Danman:

4 Channel digital storage oscilloscope
1GS/s (1channel), 500MS/s (2 channel), 250MS/s (4 channel)

See [[Hantek DSO4004C series/Info]] for more details (such as '''lsusb -v''' output) about the device.

Keysight VISA driver for windows

== Resources ==

* [http://www.hantek.com/en/ProductDetail_3_12167.html Product site]

[[Category:Device]]
[[Category:Oscilloscope]]
[[Category:Notsupported]]

Hantek DSO4004C series

2020-03-01T14:33:24Z

Danman:

4 Channel digital storage oscilloscope
1GS/s (1channel), 500MS/s (2 channel), 250MS/s (4 channel)

See [[Hantek DSO4004C series/Info]] for more details (such as '''lsusb -v''' output) about the device.

Keysight VISA driver for windows

== Resources ==

* [http://www.hantek.com/en/ProductDetail_3_12167.html Product site]

[[Category:Device]]
[[Category:Oscilloscope]]
[[Category:Unsupported]]

Hantek DSO4004C series

2020-03-01T14:32:27Z

Danman:

Hantek DSO4004C series

2020-03-01T14:27:03Z

Danman:

Hantek DSO4004C series

2020-03-01T14:22:36Z

Danman:

Hantek DSO4004C

2020-03-01T14:20:32Z

Danman: Danman moved page Hantek DSO4004C to Hantek DSO4004C series

#REDIRECT [[Hantek DSO4004C series]]

Hantek DSO4004C series

2020-03-01T14:20:32Z

Danman: Danman moved page Hantek DSO4004C to Hantek DSO4004C series

4 Channel digital storage oscilloscope
1GS/s (1channel), 500MS/s (2 channel), 250MS/s (4 channel)

Hantek DSO4004C series/Info

2020-03-01T14:19:43Z

Danman: Created page with "== lsusb DSO4104C == $ '''lsusb -v -d 049f:505c''' Bus 002 Device 109: ID 049f:505c Compaq Computer Corp. NOT defined Device Descriptor: bLength..."

Hantek DSO4004C series

2020-03-01T14:15:30Z

Danman: Created page with "4 Channel digital storage oscilloscope 1GS/s (1channel), 500MS/s (2 channel), 250MS/s (4 channel)"

4 Channel digital storage oscilloscope
1GS/s (1channel), 500MS/s (2 channel), 250MS/s (4 channel)